Intel® Server Board SE7520BD2 Technical Product Specification
Product Overview
Revision 1.3
Intel Confidential
21
The ICH5-R supports two types of DMA (LPC and PC/PCI). DMA via LPC is similar to ISA DMA.
LPC DMA and PC/PCI DMA use the ICH5-R’s DMA controller. The PC/PCI protocol allows PCI-
based peripherals to initiate DMA cycles by encoding requests and grants via two PC/PC
REQ#/GNT# pairs. LPC DMA is handled through the use of the LDRQ# lines from peripherals
and special encoding on LAD[3:0] from the host. Single, Demand, Verify, and Increment modes
are supported on the LPC interface. Channels 0–3 are 8 bit channels. Channels 5–7 are 16-bit
channels. Channel 4 is reserved as a generic bus master request.
The timer/counter block contains three counters that are equivalent in function to those found in
one 82C54 programmable interval timer. These three counters are combined to provide the
system timer function, and speaker tone. The 14.31818 MHz oscillator input provides the clock
source for these three counters.
The ICH5-R provides an ISA-compatible Programmable Interrupt Controller (PIC) that
incorporates the functionality of two 82C59 interrupt controllers. The two interrupt controllers are
cascaded so that 14 external and two internal interrupts are possible. In addition, the ICH5-R
supports a serial interrupt scheme. All of the registers in these modules can be read and
restored. This is required to save and restore system state after power has been removed and
restored to the platform.
2.9.1.6 Advanced
Programmable Interrupt Controller (APIC)
In addition to the standard ISA-compatible PIC described in the previous section, the ICH5-R
incorporates the Advanced Programmable Interrupt Controller (APIC).
2.9.1.7
Universal Serial Bus (USB) Controller
The ICH5-R contains an Enhanced Host Controller Interface Specification for Universal Serial
Bus, Revision 1.0-compliant host controller that supports USB high-speed signaling. High-speed
USB 2.0 allows data transfers up to 480 Mb/s which is 40 times faster than full-speed USB. The
ICH5-R also contains four Universal Host Controller Interface (UHCI) controllers that support
USB full-speed and low-speed signaling. On the Server Board SE7520BD2, the ICH5-R
supports five USB 2.0 ports. All five ports are high-speed, full-speed, and low-speed capable.
ICH5-R’s port-routing logic determines whether a USB port is controlled by one of the UHCI
controllers or by the EHCI controller.
The Server Board SE7520BD2 has five USB ports: three in the back, two in the front.
2.9.1.8 RTC
The ICH5-R contains a Motorola* MC146818A-compatible real-time clock with 256 bytes of
battery backed RAM. The real-time clock performs two key functions: keeping track of the time
of day and storing system data, even when the system is powered down. The RTC operates on
a 32.768 KHz crystal and a separate 3-V lithium battery. The RTC also supports two lockable
memory ranges. By setting bits in the configuration space, two 8-byte ranges can be locked to
read and write accesses. This prevents unauthorized reading of passwords or other system
security information. The RTC also supports a date alarm that allows for scheduling a wake up
event up to 30 days in advance, rather than just 24 hours in advance.
2.9.1.9
GPIO (General Purpose I/O)
Various general-purpose inputs and outputs are provided for custom system design. The
number of inputs and outputs varies depending on the ICH5-R configuration.