Intel® Server Board SE7520BD2 Technical Product Specification
Product Overview
Revision 1.3
Intel Confidential
9
The MCH is configured to support the following interfaces:
•
CPU Front Side Bus at 200 MHz operation using AGTL+ (Assisted Gunner Transceiver
Logic) signaling, 4x 64 bit data bus at 6.4 GB/s.
•
Dual memory channels supporting registered 72-bit data ECC DIMMs for DDR266/333.
DDR bandwidth of 2.13/2.6 GB/s per channel giving 4.26 GB/s for both.
•
Three PCI Express x8 interfaces with aggregate bandwidth of 4 GB/s interfaces to PXH
and other onboard devices. Each of these interfaces can be configured as two
independent x4 interfaces.
•
Hub Interface 1.5, 8 bits, 66 MHz, 266MB/s interface to the ICH5-R.
•
Debug support through XDP (Extended Debug Port) connector.
•
RASUM support through memory features and SMBus debug port access.
2.6.1
Memory Controller Hub (MCH)
The MCH uses a 1077-ball FC-BGA package in which it integrates four main functions:
•
Front Side Bus
•
Memory controller
•
PCI-Express controller
•
Hub Link controller
2.6.2
Front Side Bus (FSB)
The Intel® E7520 MCH supports either single or dual population of the Intel® Xeon™
processor. The MCH supports a base system bus frequency of 200MHz. The address and
request interface is double pumped at 400MHz while the 64-bit data interface (+ parity) is quad
pumped to 800MHz. This provides a matched system bus address and data bandwidths of
6.4GB/sec.
The newest generation of Intel® Xeon™ processors for dual-processor (DP) servers and
workstations is based on the Intel® NetBurst™ microarchitecture. These processors follow the
Intel® Xeon™ processor line, and are similarly backward compatible, while adding several
performance enhancing architectural and microarchitectural features. They also have larger L2
caches than the previous generation.
2.6.3 MCH
Memory
Sub-System
Overview
The MCH provides an integrated memory controller for direct connection to two channels of
registered DDR266 or DDR333 memory (stacked or unstacked). Peak theoretical memory data
bandwidth using DDR266 technology is 4.26 GB/s and 5.33 GB/S for DDR333 technology.
When both DDR channels are populated and operating, they function in lock-step mode. For the
Intel® E7520 MCH, the maximum supported DDR266 memory size is 32 GB, however the
Server Board SE7520BD2 has 6 DIMM sites which limits this maximum memory size to 24 GB.
The maximum supported DDR333 is 16 GB.
There are several Reliability, Availability, Serviceability, Usability and Manageability (RASUM)
features for the MCH memory interface: