TRACING AND DEBUGGING
9-11
9
9.3
GENERATING A TRACE FAULT
To summarize the information presented in the previous sections, the processor services a trace
fault when PC.te is set and the processor detects any of the following conditions:
•
An instruction included in a trace mode group executes or is about to execute (in the case of a
prereturn trace event) and the trace mode for that instruction is enabled.
•
A fault call operation executes and the call-trace mode is enabled.
•
A
mark
instruction executes and the mark-trace mode is enabled.
•
An
fmark
instruction executes.
•
The processor executes an instruction at an IP matching an enabled instruction address
breakpoint (IPB) register.
•
The processor issues a memory access matching the conditions of an enabled data address
breakpoint (DAB) register.
9.4
HANDLING MULTIPLE TRACE EVENTS
With the exception of a prereturn trace event, which is always reported alone, it is possible for a
combination of trace events to be reported in the same fault record. The processor may not report all
events; however, it will always report a supervisor event and it will always signal at least one event.
If the processor reports prereturn trace and other trace types at the same time, it reports the other
trace types in a single trace fault record first, and then services the prereturn trace fault upon return
from the other trace fault.
Table 9-4. Instruction Breakpoint Modes
PC.te
IPBx.m1
IPBx.m0
Action
0
X
X
No action. Globally disabled.
X
0
0
No action. IPBx disabled.
1
0
1
Reserved.
1
1
0
Reserved.
1
1
1
Generate a Trace Fault.
NOTE: “X” = don’t care. Reserved combinations must not be used.
Содержание i960 Jx
Страница 1: ...Release Date December 1997 Order Number 272483 002 i960 Jx Microprocessor Developer s Manual ...
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Страница 25: ...1 INTRODUCTION ...
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Страница 35: ...2 DATA TYPES AND MEMORY ADDRESSING MODES ...
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Страница 47: ...3 PROGRAMMING ENVIRONMENT ...
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Страница 73: ...4 CACHE AND ON CHIP DATA RAM ...
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Страница 85: ...5 INSTRUCTION SET OVERVIEW ...
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Страница 111: ...6 INSTRUCTION SET REFERENCE ...
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Страница 195: ...INSTRUCTION SET REFERENCE 6 83 6 Opcode mov 5CCH REG movl 5DCH REG movt 5ECH REG movq 5FCH REG See Also LOAD STORE lda ...
Страница 233: ...7 PROCEDURE CALLS ...
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Страница 257: ...8 FAULTS ...
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Страница 291: ...9 TRACING AND DEBUGGING ...
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Страница 309: ...10 TIMERS ...
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Страница 325: ...11 INTERRUPTS ...
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Страница 369: ...12 INITIALIZATION AND SYSTEM REQUIREMENTS ...
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Страница 413: ...13 MEMORY CONFIGURATION ...
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Страница 429: ...14 EXTERNAL BUS ...
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Страница 469: ...15 TEST FEATURES ...
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Страница 493: ...A CONSIDERATIONS FOR WRITING PORTABLE CODE ...
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Страница 503: ...B OPCODES AND EXECUTION TIMES ...
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Страница 515: ...C MACHINE LEVEL INSTRUCTION FORMATS ...
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Страница 523: ...D REGISTER AND DATA STRUCTURES ...
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Страница 551: ...GLOSSARY ...
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Страница 561: ...INDEX ...
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