Model 3585A
Circuit Functional Descriptions
6·1 B. AID Converter (A 1 6)
The signal enters the A16, AID Converter, board and is peak detected. Basically, this detec
tor allows the peak holding capacitor to be charged up through a diode. Should the input
signal decrease during the sample period, the diode does not allow the capacitor to
discharge, thus the peak is retained and passed on to the sample and hold circuit. The output
of the sample and hold circuit is amplified and then passed on to the AID converter.
The AID converter uses a successive approximation technique for the conversion. The out
put of the AID converter is a lO-bit approximation of the input analog signal to the AID
converter. The digital data goes to the A45 ,
110,
board and from there to the instrument
central processor.
Each AID conversion cycle begins when the JADC (initiate AID conversion) line goes low.
Each conversion cycle takes approximately 200 usec. The cycle begins by allowing the peak
detector to sample the input signal. This peak value is then read by the sample and hold cir
cuit. The peak detector is then reset to prepare for the next peak. The voltage held by the
sample and hold circuit is amplified and sent to the AID converter for conversion.
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