GE M
EDICAL
S
YSTEMS
PROPRIETARY
TO
GE
D
IRECTION
2294854-100, R
EVISION
3
LOGIQ™ 9 P
ROPRIETARY
M
ANUAL
Chapter 7 Diagnostics/Troubleshooting
7-27
7-7-4-5
Board-Level TD Diagnostics
•
All Board-Level TD Diags
: This configuration, again, tests the SCB's Clock Generation and PCI
Bridge. Additionally, the TD access functionality is more fully tested, building on the SCB's board-
level tests.
The following subsections outline the Board-Level TD Diagnostics.
•
TD Memory Diag
: This diagnostic shall test all of the on-board memory, for all installed TD boards,
including registers.
NOTE:
will enumerate the memory locations.
•
TD Access Diag
: Tests all of the Access Modes utilized for Host/TD communication, as well as
Channel RAM to Rigel transfers.
This diagnostic includes single-location accesses, single-board broadcasts, and multiple-board
broadcasts. The diagnostic will adjust its parameters depending upon how many TD boards are
installed in the system.
7-7-4-6
Board-Level XDIF Diagnostics
•
All Board-Level XDIF Diags
: Targets the XDIF. The system setup required for this Diagnostic
Group is shown in Figure 7-26.
•
This Diagnostic Group consists of a single diagnostic, outlined in the following subsection.
•
XDIF Interface Diag
: Tests the non-probe generated communication between the EQ and the
XDIF.
This diagnostic shall test all of the XDIF functionality that is testable without a probe or probe
simulator attached to the system, including the IIC communication.
Figure 7-25 Board-Level TD Block Diagram
Figure 7-26 Board-Level XDIF Block Diagram
XDIF/RF
TD’s
EQ
BMP
Scan Control Board
Host
PCI
PCI
PCI
IQ,
RxSYNC
BM
IQ
IIC
RF
Probe
RF
TD
CTRL
TxSYNC
RxSYNC
TxSYNC
TxSYNC
XDIF/RF
TD’s
EQ
BMP
Scan Control Board
Host
PCI
PCI
PCI
IQ,
RxSYNC
BM
IQ
IIC
RF
Probe
RF
TD
CTRL
TxSYNC
RxSYNC
TxSYNC
TxSYNC