GE M
EDICAL
S
YSTEMS
PROPRIETARY TO GE
D
IRECTION
2294854-100, R
EVISION
3
LOGIQ™ 9 P
ROPRIETARY
M
ANUAL
5-10
Section 5-3 - Front End Processor
5-3-2-4TD, TD4, TD5 (Time Delay) Boards (8)
Major control siganal from the EQ board are the Digital TGC/VREF and Serial Control Bus (I
2
C). Control
signal between the Scan Control board consist of Power, Timing Clocks, TD Control Bus and Fault
Interrupts
Time Delay (TD, TD4, TD5) Board Function Summary:
•
Each board assigned to a subset of 16 channels.
•
Generates and amplifies the excitation waveform for each channel.
•
Digitizes the input RF signal from the RF Amplifier board.
•
Applies dynamic apodization, dynamic receive delays, and filters to the digitized RF signal.
•
Automatically adapts receive beams for speed or resolution depending on scans.
•
Sums detected echo channel to channel, then board to board. (Boards must be contiguous.) The
last TD forwards the total output to the EQ.
•
Monitors current consumed for transmit and issues a fault signal if overcurrent is detected.
TD5 (Time Delay 5)
The TD5 Board was introduced with R3.0.0 Software and BT’03. It is not backward compatible with prior
hardware as it requires the new voltages (+/- 6V and 13V) provided by the FEPS3 Board.
Figure 5-10 Basic TD Input/Output Control Signals
