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PROPRIETARY
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2294854-100, R
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LOGIQ™ 9 P
ROPRIETARY
M
ANUAL
Chapter 7 Diagnostics/Troubleshooting
7-37
Section 7-9
Preferred Test Strategy for Memory
It is desirable to have a uniform memory testing strategy across the entire platform. This section defines
a common testing strategy for on-board memory. Deviation from this strategy may be required or
preferable in some circumstances. When this is the case, the diagnostic's SDD must note the deviation.
The three things that require testing for any memory are:
•
The address bits
•
The data bits
•
The internal memory cells
As with all diagnostics, execution time is an important consideration. This strategy has been developed
with that in mind.
Note that this procedure holds for registers, also. In that case however, "testing the address bits" is
irrelevant. Also, for registers, we additionally need to test for floating pins.
Depending upon where in the diagnostic an error is found, the nature of the error can be determined.
The following are examples of messages that can be reported:
•
Bad Address Bit (give number)
•
Bad Data Bit (give number)
•
Bad Memory Cell (give address and bit)
•
Floating Pin (give register address and bit)
Also, a log file consisting of memory addresses, expected data values, actual data values and bit-wise
differences should be provided. For example, a line in the log file might look like this:
7-9-1
General Strategy
This strategy is intended to fully test the address and data lines of a memory device and satisfactorily
test the device's internal memory cells, while minimizing the number of read and write cycles required.
7-9-1-1
Strategy for Testing the Address Bits
Consider the address memory locations defined by having a single "1" or a single "0" in the address, as
seen by the memory device. Write a unique data value to each of these addresses, and then read and
verify the data. Next, write the bit-wise inverse of the same data to the same locations, and then read
and verify the inverted data. At this point, the address lines of the memory are fully tested.
7-9-1-2
Strategy for Testing the Data Bits
To fully test the memory's data bits, start at the base address and write all of the data words defined by
having a single "1" or single "0" to the memory. Read and verify the data.
NOTE:
The designer can combine some or all of the data testing within the address testing.
Address Offset
Expected Data
Actual Data
Difference Mask
56 (0x38)
0x38 (0011 1000b)
0x2A (0010 1010b)
0x12 (0001 0010b)
