Eaton XN-GW Series, Руководство пользователя

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5 Implementation of EtherNet/IP
5.3 VSC-Vendor Specific Classes
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XI/ON: XNE-GWBR-2ETH-IP 09/2011 MN05002007Z-EN www.eaton.com
123
(7Bh) Diagnostics G WORD Bit 3:
– 0 = A comparison of the register contents
has produced the following result:
(REG_SSI_POS)
≧ (REG_LOWER_LIMIT)
– 1 = "error POS < LOWER LIMIT" A
comparison of the register contents has
produced the following result:
(REG_SSI_POS) < (REG_LOWER_LIMIT)
Bit 4:
– 0 = The parameter set of the module has
been accepted.
– 1 = "parameterization error" Operation of
the module is not possible with the
present parameter set.
Bit 5 to 15: reserved
124
(7Ch) Check mode G/S WORD Bit 0 to 4: reserved
Bit 5:
0 = ZERO test of data cable.
1 = "disable SSI error detection"
After the last valid bit, a ZERO test of the
data cable is not carried out.
Bit 6 to 15: reserved
A
INVALID_BITS:
INVALID BITS
MSB + INVALID
BITS LSB
125
(7Dh) Invalid bits LSB
A
G/S USINT Number of invalid bits on the LSB side of
the position value supplied by the SSI
encoder. The meaningful word width of the
position value transferred to the module bus
master is as follows: FRAME LENGTH -
INVALID BITS MSB -
INVALID BITS LSB.
The invalid bits on the LSB side are removed
by shifting the position value to the right,
starting with the LSB.
(Default 0 Bit = 0hex). INVALID BITS MSB +
INVALID BITS LSB must always be less
than FRAME LENGTH.
Table 58:
Object instance Attr.
no.
dec.
(hex.)
Attribute name G et/
S et
Type Description