U6D, a single-pole-single-throw (SPST) analog switch, is controlled by the same line that controls the on/off
pulsing of the LEDs. When either of the LEDs are on (the line is low and the switch is closed) U35 is used as a
non-inverting amplifier. When the LEDsa re both off, U35 is used as a non-inverting amplifier. When the LEDs
are both off, U35 is used in an inverting amplifier. The signal at the output of amplifier U35 is then
demultiplexed.
The CPU HSO lines SAMPRED and SAMPIR, which are both active low, control SPST analog switches U6A
and U6B respectively. Switch U6A is closed to sample the red signal; switch U6B is closed to sample the IR
signal. The sampling rate for both switches is 10 kHz. Switching is coordinated with the LED transmission so
that the IR and red signals are each sampled twice per cycle; that is, once when the LED is off (signal inverted),
and once when the LED is on (signal not inverted). The filtering circuit that follows has a long time constant,
thereby acting as an averaging circuit.
If the instantaneous average photocurrent (DC offset) is excessive and UID cannot bring it to VREF, the
PHOTOI line to the CPU (HSI0) is activated. This action is an indication of excess ambient light into the
photosensor, or the occurrence of excess noise in the input circuit. It also serves as a warning to the instrument
that the sensor signal may be contaminated and causes the software to send an error message. After about 3
seconds of continuous photocurrent signal, pulse search annunciation will begin. After about 10 seconds of
continuous photocurrent signal, zeros will be displayed.
Signal Gain
The separated IR and red signals are amplified so that their DC values are within the range of the A/D
converter. Because the received IR and red signals are typically at different current levels, the signal gain
circuits provide independent amplification of each signal as needed. The gain in these circuits is adjusted by
means of the PWM lines.
After the IR and red signals are amplified, they are filtered to improve the signal-to-noise ratio and clamped to a
reference voltage to prevent the combined AC and DC signal from exceeding an acceptable input voltage from
the A/D converter.
Variable Gain Circuits
The two variable gain circuits are functionally equivalent. The gain of each circuit is contingent upon the signals
received level and is controlled to bring each signal to -3.5 V. Each circuit uses an amplifier and one switch in the
trip SPDT analog multiplexing unit U2.
The gain in each of the circuits is accomplished by means of a feedback loop, which includes one of the SPDT
switches in U2. The PWMs control whether the feedback loop is connected to ground or to the amplifier output.
The feedback is then averaged by C33/R25 (red), and C34/R24 (IR). The higher the value of PWM2, the
greater the IR gain; the higher the value of PWM1, the greater the red gain.
Filtering Circuits
These circuits consist of two cascaded second-order filters with a break point frequency of 10 Hz. Pairs of
diodes (D1/D3 and D2/D4), which are located between VREF and ground at the positive inputs of the second
amplifiers, maintain the voltage output within the range of the A/D converter.
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