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Model 8/[F:8] Registers
23
23913A/0—November 2000
Embedded AMD-K6™ Processors BIOS Design Guide
Preliminary Information
Model 8/[F:8] Registers
The AMD-K6-2 processor Model 8/[F:8] and AMD-K6-2E
processor Model 8/[F:8] provides the ten MSRs listed in Table
12.
The contents of ECX select the MSR to be addressed by the
RDMSR and WRMSR instruction.
Table 12. Model-Specific Registers Supported by Model 8/[F:8]
Register Name
Mnemonic
ECX Value
Description
Comments
Machine-Check Address Register
MCAR
00h
page 16
Identical on all models
Machine-Check Type Register
MCTR
01h
page 16
Identical on all models
Test Register 12
TR12
0Eh
page 16
Identical on all models
Time Stamp Counter
TSC
10h
page 16
Identical on all models
Extended Feature Enable Register
EFER
C000_0080h
page 24
Newly defined for Model 8/[F:8]
Write Handling Control Register
WHCR
C000_0082h
page 27
Newly defined for Model 8/[F:8]
SYSCALL/SYSRET Target Address Register STAR
C000_0081h
page 22
Identical to Model 8/[7:0]
UC/WC Cacheability Control Register
UWCCR
C000_0085h
page 30
New for Model 8/[F:8]
Processor State Observability Register
PSOR
C000_0087h
page 34
New for Model 8/[F:8]
Page Flush/Invalidate Register
PFIR
C000_0088h
page 36
New for Model 8/[F:8]