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System Management Mode (SMM)
13
23913A/0—November 2000
Embedded AMD-K6™ Processors BIOS Design Guide
Preliminary Information
System Management Mode (SMM)
This section documents the System Management Mode (SMM)
differences between specified models of the AMD-K6 processor
and the Pentium
processor. For more information on SMM
implementation in the K86 processors, see the appropriate
AMD-K6 or AMD-K6E processor data sheet.
State-Save Map Differences
The SMM implemented in the AMD-K6 processor differs from
the SMM implemented in the Pentium® processor in one way.
The Interrupt Descriptor Table (IDT) base location in the
AMD-K6 processors is located at offset FF90h. The Pentium
processor has the IDT base located at offset FF94h.
I/O Trap Dword Differences
The I/O trap dword is located at offset FFA4h. Its AMD-K6
processor bit fields are shown in Table 6. This state-save area,
which is reserved in Pentium processors, contains information
regarding an I/O instruction that may have been trapped by an
SMI# assertion.
Table 6.
AMD-K6™ Processor I/O Trap Dword Configuration at Offset FFA4h
Bits 31–16
Bits 15–4
Bit 3
Bit 2
Bit 1
Bit 0
I/O Port Address
Reserved
Rep String Operation
I/O String Operation
Valid I/O Instruction
Input or Output