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8
States after RESET and INIT
Embedded AMD-K6™ Processors BIOS Design Guide
23913A/0—November 2000
Preliminary Information
States after RESET and INIT
Register States after RESET and INIT
After the processor has completed its initialization following
the recognition of an asserted RESET or INIT signal, the states
of all architecture registers and MSRs are compatible with
those of Pentium processors. Differences are listed in Table 2
through Table 4.
Table 2.
AMD-K6™E Processor (Model 7) and AMD-K6™ Processor (Model
8/[7:0]) State after RESET
Register
RESET State
EDX
0000_05MSh
1
Notes:
1. “M” represents the Model and “S” represents the Stepping.
EFER
0000_0000_0000_0000h
STAR
2
2. Processor Model 7 does not support the STAR register.
0000_0000_0000_0000h
WHCR
0000_0000_0000_0000h
Table 3.
AMD-K6™ Processor (Model 8/[F:8]) and AMD-K6™-2E Processor
(Model 8/[F:8]) State after RESET
Register
RESET State
EDX
0000_05MSh
1
Notes:
1. “M” represents the Model and “S” represents the Stepping.
EFER
0000_0000_0000_0002h
PFIR
0000_0000_0000_0000h
PSOR
0000_0000_0000_01SBh
1,2
2. “B” represents PSOR[3:0], where PSOR[3] equals 0, and PSOR[2:0] is equal to the value of the
BF[2:0] signals sampled during the falling transition of RESET.
STAR
0000_0000_0000_0000h
UWCCR
0000_0000_0000_0000h
WHCR
0000_0000_0000_0000h