12.4.3.2
Logic diagram
The function contains logic to enable the open and close commands respectively if the
interlocking conditions are fulfilled. That means also, if the switch has a defined end
position for example, open, then the appropriate enable signal (in this case EN_OPEN)
is false. The enable signals EN_OPEN and EN_CLOSE can be true at the same time
only in the intermediate and bad position state and if they are enabled by the
interlocking function. The position inputs come from the logical nodes Circuit breaker/
Circuit switch (SXCBR/SXSWI) and the enable signals come from the interlocking
logic. The outputs are connected to the logical node Switch controller (SCSWI). One
instance per switching device is needed.
OPEN_EN
POSOPEN
POSCLOSE
EN_OPEN
EN_CLOSE
CLOSE_EN
SCILO
en04000525_ansi.vsd
OR
OR
XOR
AND
AND
AND
AND
NOT
ANSI04000525 V1 EN
Figure 355:
SCILO (3) function logic diagram
12.4.3.3
Function block
ANSI05000359-1-en.vsd
SCILO (3)
POSOPEN
POSCLOSE
OPEN_EN
CLOSE_EN
EN_OPEN
EN_CLOSE
ANSI05000359 V1 EN
Figure 356:
SCILO (3) function block
12.4.3.4
Input and output signals
Table 353:
SCILO (3) Input signals
Name
Type
Default
Description
POSOPEN
BOOLEAN
0
Open position of switch device
POSCLOSE
BOOLEAN
0
Closed position of switch device
OPEN_EN
BOOLEAN
0
Open operation from interlocking logic is enabled
CLOSE_EN
BOOLEAN
0
Close operation from interlocking logic is enabled
1MRK505222-UUS C
Section 12
Control
695
Technical reference manual
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