Toshiba TLCS-900/H1 Series, Manual

Page: 162 / 652

TMP92CF30
2009-06-15 92CF30-160
CPU Data
O perand Data
Size (bit)
O perand Start
Address
Mem ory Bus W idth
(bit)
CPU A ddress
D31 to D24 D23 to D16 D15 to D8 D7 to D0
4n
+
0 8/16/32 4n
+
0 xxxxx xxxxx xxxxx b7 to b0
8 4n
+
1 xxxxx xxxxx xxxxx b7 to b0
4n
+
1
16/32 4n
+
1 xxxxx xxxxx b7 to b0 xxxxx
8/16 4n
+
2 xxxxx xxxxx xxxxx b7 to b0
4n
+
2
32 4n
+
2 xxxxx b7 to b0 xxxxx xxxxx
8 4n
+
3 xxxxx xxxxx xxxxx b7 to b0
16 4n
+
3 xxxxx xxxxx b7 to b0 xxxxx
8
4n
+
3
32 4n
+
3 b7 to b0 xxxxx xxxxx xxxxx
(1) 4n
+
0 xxxxx xxxxx xxxxx b7 to b0
8
(2) 4n
+
1 xxxxx xxxxx xxxxx b15 to b8
4n
+
0
16/32 4n
+
0 xxxxx xxxxx b15 to b8 b7 to b0
(1) 4n
+
1 xxxxx xxxxx xxxxx b7 to b0
8
(2) 4n
+
2 xxxxx xxxxx xxxxx b15 to b8
(1) 4n
+
1 xxxxx xxxxx b7 to b0 xxxxx
16
(2) 4n
+
2 xxxxx xxxxx xxxxx b15 to b8
4n
+
1
32 4n
+
1 xxxxx b15 to b8 b7 to b0 xxxxx
(1) 4n
+
2 xxxxx xxxxx xxxxx b7 to b0
8
(2) 4n
+
1 xxxxx xxxxx xxxxx b15 to b8
16 4n
+
2 xxxxx xxxxx b15 to b8 b7 to b0
4n
+
2
32 4n
+
2 b15 to b8 b7 to b0 xxxxx xxxxx
(1) 4n
+
3 xxxxx xxxxx xxxxx b7 to b0
8
(2) 4n
+
4 xxxxx xxxxx xxxxx b15 to b8
(1) 4n
+
3 xxxxx xxxxx b7 to b0 xxxxx
16
(2) 4n
+
4 xxxxx xxxxx xxxxx b15 to b8
(1) 4n
+
3 b7 to b0 xxxxx xxxxx xxxxx
16
4n
+
3
32
(2) 4n
+
4 xxxxx xxxxx xxxxx b15 to b8
(1) 4n
+
0 xxxxx xxxxx xxxxx b7 to b0
(2) 4n
+
1 xxxxx xxxxx xxxxx b15 to b8
(3) 4n
+
2 xxxxx xxxxx xxxxx b23 to b16
8
(4) 4n
+
3 xxxxx xxxxx xxxxx b31 to b24
(1) 4n
+
0 xxxxx xxxxx b15 to b8 b7 to b0
16
(2) 4n
+
2 xxxxx xxxxx b31 to b24 b23 to b16
4n
+
0
32 4n
+
0 b31 to b24 b23 to b16 b15 to b8 b7 to b0
(1) 4n
+
0 xxxxx xxxxx xxxxx b7 to b0
(2) 4n
+
1 xxxxx xxxxx xxxxx b15 to b8
(3) 4n
+
2 xxxxx xxxxx xxxxx b23 to b16
8
(4) 4n
+
3 xxxxx xxxxx xxxxx b31 to b24
(1) 4n
+
1 xxxxx xxxxx b7 to b0 xxxxx
(2) 4n
+
2 xxxxx xxxxx b23 to b16 b15 to b8 16
(3) 4n
+
4 xxxxx xxxxx xxxxx b31 to b24
(1) 4n
+
1 b23 to b16 b15 to b8 b7 to b0 xxxxx
4n
+
1
32
(2) 4n
+
4 xxxxx xxxxx xxxxx b31 to b24
(1) 4n
+
2 xxxxx xxxxx xxxxx b7 to b0
(2) 4n
+
3 xxxxx xxxxx xxxxx b15 to b8
(3) 4n
+
4 xxxxx xxxxx xxxxx b23 to b16
8
(4) 4n
+
5 xxxxx xxxxx xxxxx b31 to b24
(1) 4n
+
2 xxxxx xxxxx b15 to b8 b7 to b0
16
(2) 4n
+
4 xxxxx xxxxx b31 to b24 b23 to b16
(1) 4n
+
2 b15 to b8 b7 to b0 xxxxx xxxxx
4n
+
2
32
(2) 4n
+
4 xxxxx xxxxx b31 to b24 b23 to b16
(1) 4n
+
3 xxxxx xxxxx xxxxx b7 to b0
(2) 4n
+
4 xxxxx xxxxx xxxxx b15 to b8
(3) 4n
+
5 xxxxx xxxxx xxxxx b23 to b16
8
(4) 4n
+
6 xxxxx xxxxx xxxxx b31 to b24
(1) 4n
+
3 xxxxx xxxxx b7 to b0 xxxxx
(2) 4n
+
4 xxxxx xxxxx b23 to b16 b15 to b8
16
(3) 4n
+
6 xxxxx xxxxx xxxxx b31 to b24
(1) 4n
+
3 b7 to b0 xxxxx xxxxx xxxxx
32
4n
+
3
32
(2) 4n
+
4 xxxxx b31 to b24 b23 to b16 b15 to b8
xxxxx: The input data placed on the data bus indicated by this symbol is ignored during a read operation. During a
write operation, the bus is in the high-impedance state, and the write strobe signal remains inactive.