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Control Registers and RAM
Multi-Buffer Serial Peripheral Interface (MibSPI) (SPNU217B)
73
Bits 12:5
PRESCALEx.
SPI data format x prescaler.
PRESCALEx can be modified in privilege mode only.
PRESCALEx
determines the bit transfer rate of data format x if the SPI is the
network master. PRESCALEx is directly derived from ICLK. If the MibSPI is
configured as slave PRESCALEx DOES NOT NEED to be configured.
The clock rate for data format x can be calculated as shown in Equation 5..
Equation 5.
SPI clock rate for data format x
When PRESCALEx is set to zero (0), the SPI clock rate is ICLK/2.
Bits 4:0
CHARLENx.
SPI data format x data word length.
CHARLENx
defines the word length of data format x. Legal values are 0x02
(data word length = 2 bit) to 0x10 (data word length = 16). Illegal values, such
as 0x00 or 0x1F are not detected and their effect is indeterminate.
BR
Formatx
ICLCK
PRESCALEx
1
+
(
)
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Summary of Contents for TMS470R1x
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