MibSPI Operation Modes
Multi-Buffer Serial Peripheral Interface (MibSPI) (SPNU217B)
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The trigger sources have to be defined individually for each implementation
of MibSPI into a TMS470 derivative. External trigger sources might by a HET
I/O channel or a GIO pin re-used as trigger input.
The number of transfer groups must be defined individually for each MibSPI
macro cell. Up to 16 transfer groups are supported.
2.8.1
Buffer Initialization
After reset, the buffer RAM is initialized. This process takes as many cycles
as the number of buffers contained in the RAM, that is, a 128 buffer RAM will
take 128 cycles to initialize. During this process, the CPU is held in reset by
the MibSPI.
2.9
Multiple Chip Select (Master only)
The MibSPI supports multi chip-select (multiCS) modes. The MibSPI is able
to support encoded chip-select and decoded chip-select.
The MibSPI could connect up to eight individual slave devices that use
decoded chip-select by routing one wire to each slave. For the decoded
“mode”, the eight chip-selects in the control field are directly connected to the
eight pins. The default value of each chip-select can be configured via the
register CSDEF. During the transmission, the value of the chip-select control
field (CSNR[7:0]) of the SPIDAT1 register (SPIDAT1[23:16]) is applied to the
pins. When the transmission finishes, the default register value (CSDEF) is
applied to the chip-select pins.
To connect the MibSPI with encoded slave devices, the CSNR field allows
multiple active bits at a time. The user could apply any value from 0 to 255 to
provide a binary-encoded chip-select signal via the eight chip-select lines. All
eight chip-select lines must be connected to each slave device and each
slave needs to have unique address decoding. The CSDEF register provides
the address at which slaves devices are all de-selected.
Using only on part of the chip select line as encoded, users could use the
remaining chip select as decoded lines. Since the control field is 8 bit wide,
the encoding of some chip select could be done easily, the remaining
decoded lines just have to be set once at a time for only one active slave.
2.10
Slave Mode in Multi-buffer Configuration
When operating in slave mode, the MibSPI uses the chip-select pins 0 to 3 to
generate a trigger to the corresponding Transfer Group Setting “0000” on the
chip-select pins triggers Transfer Group 0, “0001” triggers TG1. When the
value “1111” is set to the chip-select, the MibSPI is deselected - that is
Transfer Group 15 is not available in slave mode. Chip-select pins 4 to 7
should be kept in GPIO mode. In slave mode, the fields TRIGSRC and
Summary of Contents for TMS470R1x
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