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Control Registers and RAM
56
7.11
MibSPI Pin Control Register 2 (SPIPC2)
Bits 31:12
Reserved.
Reads are undefined and writes have no effect
Bit 11:4
SCSDINx.
SPISCSx data in.
Reflects the value of the SPISCSx pins.
0 =
Current value on SPISCSx pin is logic 0.
1 =
Current value on SPISCSx pin is logic 1
Bit 3
SOMIDIN.
SPISOMI data in.
Reflects the value of the SPISOMI pin.
0 =
Current value on SPISOMI pin is logic 0.
1 =
Current value on SPISOMI pin is logic 1
Bit 2
SIMODIN.
SPISIMO data in.
Reflects the value of the SPISIMO pin.
0 =
Current value on SPISIMO pin is logic 0.
1 =
Current value on SPISIMO pin is logic 1
Bit 1
CLKDIN.
Clock data in.
Reflects the value of the SPICLK pin.
0 =
Current value on SPICLK pin is logic 0.
1 =
Current value on SPICLK pin is logic 1
Bit 0
ENADIN.
SPIENA data in.
Reflects the value of the SPIENA pin.
0 =
Current value on SPIENA pin is logic 0.
1 =
Current value on SPIENA pin is logic 1
Bits
31
16
0x20
Reserved
U
Bits
15
12
11
10
9
8
Reserved
SCSDIN7
SCSDIN6
SCSDIN5
SCSDIN4
U
R-U
R-U
R-U
R-U
Bits
7
6
5
4
3
2
1
0
SCSDIN3
SCSDIN2
SCSDIN1
SCSDIN0
SOMIDIN
SIMODIN
CLKDIN
ENADIN
R-U
R-U
R-U
R-U
R-U
R-U
R-U
R-U
Legend: R = Read, C = Clear, U = Undefined;
-n =
Value after reset
Summary of Contents for TMS470R1x
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