7D14
SECTION
3
CIRCUIT DESCRIPTION
Change information, if
any, affecting this section will be found at the rear of this manual.
Introduction
This
section
of the manual contains a description of the
circuitry
used in the 7D14 Digital Counter Plug-In. The
description
starts
with a
block diagram. Following the
block
diagram
description is a discussion of the control
signals generated
within the instrument. After the control
signals
discussion
is
a more
detailed circuit
description,
particularly
for circuits unique to this instrument. If more
information
is desired on commonly used circuits,
refer
to
the following textbooks:
Jacob
Millman and Herbert Taub, "Pulse,
Digital, and
Switching Waveforms",
McGraw-Hill,
New York,
1965.
Tektronix
Circuit Concepts Book (order from your local
Tektronix Field
Office or representative):
Digital
Concepts,
Tektronix
Part
No. 062-1030-00.
Following the detailed
circuit description is a brief dis
cussion of the readout system used in Tektronix 7000-series
Oscilloscopes. If more
information is
desired on
the
readout
system,
refer
to the instruction manual for the oscilloscope.
BLOCK
DIAGRAM
The
following discussion is provided to aid
in under
standing
the overall concept of the
7D14 before the indi
vidual
circuits are discussed
in detail. A basic block diagram
of
the 7D14
is shown in Fig. 3-1. A more detailed block
diagram
is
given in the
Diagrams section. Only the basic
interconnections between
the individual blocks are shown
on
the block diagram. Each block represents a major circuit
within
the
instrument. The number on each block refers to
the schematic on
which the complete circuit is found.
Signals
to be
counted are applied to
the Channel A Sig
nal
Conditioning circuit via either the CH A INPUT connec
tor
or the
oscilloscope trigger pickoff
circuitry. The
Channel
A Signal Conditioning circuit selects and condi
tions
the
input signal to generate a uniform trigger output
(Clock). The
Clock output
is switched on and off by
the
GATE
signal from the Time
Base and Control circuit to
drive
the
First Decade Counter. Also, an
output from the
Trigger
Generator
(prior to the gated stage) is provided to
the
oscilloscope vertical system to be displayed on the
CRT.
Logic
Fundamentals
Signal
lines
in this instrument are named to indicate the
state at which their
particular function is performed. For
example,
the line labeled "RESET" means that the affected
circuit(s
)
is reset when this line is HI; the line labeled "DCU
RESET".
(DCU RESET — NOT) means that the affected
circuits
are
reset
when this line is LO.
Digital
logic
techniques
are used to
perform many
functions
within this instrument. The function and opera
tion
of the
logic circuits are described using
logic sym
bology and terminology.
For further information,
see
Logic
Fundamentals
in Section 3 of the oscilloscope instruction
manual.
The
First
Decade Counter circuit is the 10° decade or
units counter of the 7D14. This
circuit counts the Channel
A
Signal Conditioning circuit Clock
output, and provides a
units-count,
binary-coded-decimal
(BCD) output to
the
Counter and
Readout Encoding circuit. At the tenth Clock
input,
the First Decade Counter circuit provides a CARRY
output to the
Counter and
Readout Encoding circuit.
The
Counter circuit counts the CARRY output from the
First
Decade Counter, and translates the count to
a BCD
form.
This
BCD data, along with the BCD output from the
First
Decade
Counter, is stored in
the
Storage Registers.
Upon command
of
the Time
Base and Control circuit DIS
PLAY
output, the stored BCD
data is transferred to the
Readout Encoding circuit.
NOTE
All
references
to direction of current in this manual
are
in
terms of conventional current; i.e., from plus to
minus.
The
Readout Encoding circuit sequences the
BCD data
to
encode data so the oscilloscope readout system can dis
play
a digital readout of the count. The sequencing is deter
mined by the time-slot inputs from the oscilloscope readout
system
to ensure
proper placement
of each digit in
the
3-1
Summary of Contents for 7D14
Page 4: ...7D14 ...
Page 11: ...Operating Instructions 7D14 Fig 2 1 7D14 front panel controls and connectors 2 2 ...
Page 33: ... 3 13 Fig 3 11 Logic diagram for Zero Cancel Logic stage Circuit Description 7D14 ...
Page 38: ...3 18 Fig 3 16 Time Base and Control circuit detailed block diagram Circuit Description 7D14 ...
Page 44: ...NOTES ...
Page 46: ...NJ Fig 4 1 Electrode configuration for semiconductors in this instrument I ...
Page 68: ...NOTES ...
Page 96: ... 7DI 4 DIGITAL COUNTER UNIT ...
Page 98: ...GRS 0371 BLOCK DIAGRAM ...
Page 99: ......
Page 103: ...0 0 I 200 mV 500 µs 0 001 200 mV 500 µs 0 001 MHz 00 mV E 00 µs 0 001 MHz ...
Page 106: ...1 ...
Page 110: ...A2 Logic Circuit Board Assembly jQ798i 798 jc743 CR744t uni R724 R742 JL744S FrR796 ...
Page 113: ......
Page 114: ...P 0 A2 LOGIC BOARD ...
Page 121: ... A B D t F H J NPR Tj ZWX V A AC M AEA HUM qAZ DEF HJ N P R S T J V V7X y ABM APAI AA 7DI4 ...
Page 129: ......
Page 130: ...4 7D14 DIGITAL COUNTER ...