Circuit
Description—
7D14
TRIG IN A
TRIGGER
DISPLAY
SIGNAL
Readout
Encoding
Outputs
Time-Slot
Inputs
-s
OSCILLOSCOPE
\
INTERFACE
(
CONNECTOR
Fig.
3-1. 7D14 basic
block diagram.
readout
display. This circuit also encodes the readout sys
tem
to display appropriate measurement units, decimal
position,
and over-range indication.
in understanding the signals
as they
are used in the other
circuits.
The
Time
Base and Control circuit
provides logic level
outputs
to the
other 7D14 circuits to determine when
the
counter
is allowed
to count, when
the readout display is
updated, and
when the counter is reset. These output sig
nals
are
described
under Control Signals in this section.
Control
Signals
The
7D14 counts
pulses and encodes the oscilloscope
readout system
to display
the resultant count. The total
count
is equal to the pulse rate
multiplied by the time the
counter
is
allowed to count.
The
Time
Base and Control circuit outputs are the
GATE,
DISPLAY,
and
DCU RESET. These output logic
levels are
represented
in Fig.
3-2. Fig.
3-2 also shows the
time-relationship that exists between
the outputs
in the
usual
operating modes.
GATE.The GATE
output
indicates when the counter is
allowed
to
count. When this output
level is HI (T-j toT2>,
the GATE
is "on"; and the counter counts the input signal.
The front-panel GATE
indicator
lamp is
on during the
GATE
"on" time.
The GATE "on" time is determined by
the
MEASUREMENT INTERVAL switch setting (see Sec
tion
2).
The
signals
which determine when the counter is allowed
to count, when the readout
display is updated, and when
the counter
is reset are
generated in
the Time Base and
Control
circuit.
The generation
and the time-relationship
between these
signals are determined by
the settings of the
MEASUREMENT INTERVAL, DISPLAY
TIME, REF
FREQ/CH B, and Manual
Gate
Storage controls. These con
trol
settings, in conjunction with external
signals (when
used),
determine
the 7D14 measurement
mode. The
function
of the 7D14 controls and connectors is described
in Section
2. A complete description of the Time Base and
Control
circuit is given later in
this section. The following
brief description
of these control signals
is provided to aid
DISPLAY
.This output
indicates when the readout dis
play
is
to
be updated. When this output level is LO, the
measurement
made
by the counter is transferred to the
readout
display. For most operating modes, DISPLAY is
generated at the end of
the GATE
"on" time (T2).
DCU
RESET.This
output
indicates when the counter is
to be
reset
to
zero. When this
output level is
LO, the
counter
is
reset to zero.
DCU RESET is generated atT^ at
a
time after T2 as determined by the DISPLAY TIME con
trol.
3-2
Summary of Contents for 7D14
Page 4: ...7D14 ...
Page 11: ...Operating Instructions 7D14 Fig 2 1 7D14 front panel controls and connectors 2 2 ...
Page 33: ... 3 13 Fig 3 11 Logic diagram for Zero Cancel Logic stage Circuit Description 7D14 ...
Page 38: ...3 18 Fig 3 16 Time Base and Control circuit detailed block diagram Circuit Description 7D14 ...
Page 44: ...NOTES ...
Page 46: ...NJ Fig 4 1 Electrode configuration for semiconductors in this instrument I ...
Page 68: ...NOTES ...
Page 96: ... 7DI 4 DIGITAL COUNTER UNIT ...
Page 98: ...GRS 0371 BLOCK DIAGRAM ...
Page 99: ......
Page 103: ...0 0 I 200 mV 500 µs 0 001 200 mV 500 µs 0 001 MHz 00 mV E 00 µs 0 001 MHz ...
Page 106: ...1 ...
Page 110: ...A2 Logic Circuit Board Assembly jQ798i 798 jc743 CR744t uni R724 R742 JL744S FrR796 ...
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Page 114: ...P 0 A2 LOGIC BOARD ...
Page 121: ... A B D t F H J NPR Tj ZWX V A AC M AEA HUM qAZ DEF HJ N P R S T J V V7X y ABM APAI AA 7DI4 ...
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Page 130: ...4 7D14 DIGITAL COUNTER ...