Calibration—
7D14
OUTPUT
SIGNALS
CHECKS
Equipment
Required
1. Indicator Oscilloscope
5. Five-nanosecond
GR
cable
2. Amplifier plug-in unit
6.
50-ohm in-line
termination
3.
Time-base plug-in unit
7. 18-inch
BNC cable
8. BNC T
connector
4. Medium-frequency constant-amplitude sine-wave gener-
ator
9.
BSM to BNC
male adapter
Control
Settings
Set
the controls as given under Preliminary
Control
Settings.
13.
Check
INT
1 MHz
Output
a.
Set
the
amplifier unit for a vertical
deflection factor
of 1
volt/division
and the time-base unit for a sweep rate of
0.5 µs/division.
b.
Connect
the REF
FREQ/CH
B MONITOR output to
the amplifier unit
input through the
BSM to BNC
female
adapter and 18-inch
BNC cable.
c. CHECK—
CRT display for
vertical deflection
of five
divisions ±0.5 division.
d.
Disconnect the cable and
adapter.
14.
Check
Internal
Gate
Time
Mark
Output
a.
Change
the following control
settings:
7D14
MEASUREMENT
INTERVAL 1 ms
b. Connect
the MEASUREMENT INTERVAL MONI
TOR
output
to the
amplifier unit input through the BSM
to
BNC female adapter and 18-inch
BNC cable.
c. Set
the time-base
unit for a sweep rate of 0.2 ms/
division.
d. CHECK—CRT
display for vertical deflection
of five
divisions
±0.5 division. Positive gate duration should be
about five divisions.
e.
Disconnect the cable and
adapter.
15.
Check
Trigger
Indicator
a.
Change
the following control settings:
Indicator
Oscilloscope
Vertical
Mode
Chop
b.
Set
the amplifier
unit for a vertical deflection factor
of 0.1
volt/division and the time-base
unit for a sweep rate
of 0.5 ms/division.
c. Connect
the
medium-frequency
constant-amplitude
sine-wave generator to the CH A INPUT through the five-
nanosecond
GR cable, 50-ohm in-line termination, and
BNC T connector. Connect the output
of the T connector
to
the amplifier unit input through the 18-inch BNC cable.
d. Set
the medium-frequency generator for a four-
division
display (0.4 volt)
at 50 kHz.
e.
Center the sine-wave
display
with the
amplifier unit
Position
control.
f.
CHECK—Trigger
Indicator display (square wave)
for
vertical
deflection
of 0.2 division
±0.05 division.
g.
Disconnect all test equipment.
This completes
the Performance Check of the
7D14.
5-11
Summary of Contents for 7D14
Page 4: ...7D14 ...
Page 11: ...Operating Instructions 7D14 Fig 2 1 7D14 front panel controls and connectors 2 2 ...
Page 33: ... 3 13 Fig 3 11 Logic diagram for Zero Cancel Logic stage Circuit Description 7D14 ...
Page 38: ...3 18 Fig 3 16 Time Base and Control circuit detailed block diagram Circuit Description 7D14 ...
Page 44: ...NOTES ...
Page 46: ...NJ Fig 4 1 Electrode configuration for semiconductors in this instrument I ...
Page 68: ...NOTES ...
Page 96: ... 7DI 4 DIGITAL COUNTER UNIT ...
Page 98: ...GRS 0371 BLOCK DIAGRAM ...
Page 99: ......
Page 103: ...0 0 I 200 mV 500 µs 0 001 200 mV 500 µs 0 001 MHz 00 mV E 00 µs 0 001 MHz ...
Page 106: ...1 ...
Page 110: ...A2 Logic Circuit Board Assembly jQ798i 798 jc743 CR744t uni R724 R742 JL744S FrR796 ...
Page 113: ......
Page 114: ...P 0 A2 LOGIC BOARD ...
Page 121: ... A B D t F H J NPR Tj ZWX V A AC M AEA HUM qAZ DEF HJ N P R S T J V V7X y ABM APAI AA 7DI4 ...
Page 129: ......
Page 130: ...4 7D14 DIGITAL COUNTER ...