Calibration
—
7D
14
PART
l-PERFORMANCE CHECK
Introduction
Output
Signals Checks
The following
procedure checks
the
performance of the
7D14
without removing the
side
shields or making internal
adjustments.
All tolerances
given
in this procedure are
based
on Section
1
of this manual.
Index
to
Part
I
—
Performance
Check
Channel A
Checks
1.
Check CH A
INPUT Frequency Range
Page 5-5
2.
Check CH
A INPUT 50 Ω Sensitivity
and
Low-Frequency
Range (AC-COUPLING)
5-5
3. Check CH
A INPUT 1 MΩ Sensitivity
and
Low-Frequency Range
5-6
4. Check TRIG
SOURCE Sensitivity
5-6
5.
Check BW-5 MHz
5-6
6.
Check
Trigger LEVEL Range and
SLOPE Selection
5-7
Measurement
Interval Checks
7.
Check
Crystal Oscillator
Accuracy
Page 5-8
8.
Check Internal Gate Range
5-8
9. Check Channel
B Frequency Range and
5-9
Sensitivity
10. Check
External Gate
11. Check Manual Gate
12.
Check
External
Reset
5-9
5-10
5-10
13.
Check
INT
1 MHz Output
Page
5-11
14.
Check
Internal
Gate Time Mark Output
5-11
15.
Check Trigger Indicator
5-11
Preliminary
Procedure
for Performance
Check
NOTE
The performance
of this instrument can be checked
at
any
temperature within the 0°C to +50°C
range
unless
stated
otherwise.
1.
Install
the 7D14 in the B horizontal plug-in compart
ment of the Indicator Oscilloscope.
2.
Connect
the Indicator Oscilloscope to a power source
which meets the frequency and voltage requirements of the
oscilloscope power supply.
3.
Turn the
Indicator Oscilloscope
power on. Allow at
least twenty
minutes warmup for checking the 7D14 to the
given accuracy.
4.
Set
the
controls as given
under Preliminary Control
settings.
5.
Advance
the Indicator Oscilloscope
Readout control
to
obtain
a usable readout display. Adjust the Focus and
Astigmatism
controls as necessary for well-defined char
acters
in
the display.
5-4
Summary of Contents for 7D14
Page 4: ...7D14 ...
Page 11: ...Operating Instructions 7D14 Fig 2 1 7D14 front panel controls and connectors 2 2 ...
Page 33: ... 3 13 Fig 3 11 Logic diagram for Zero Cancel Logic stage Circuit Description 7D14 ...
Page 38: ...3 18 Fig 3 16 Time Base and Control circuit detailed block diagram Circuit Description 7D14 ...
Page 44: ...NOTES ...
Page 46: ...NJ Fig 4 1 Electrode configuration for semiconductors in this instrument I ...
Page 68: ...NOTES ...
Page 96: ... 7DI 4 DIGITAL COUNTER UNIT ...
Page 98: ...GRS 0371 BLOCK DIAGRAM ...
Page 99: ......
Page 103: ...0 0 I 200 mV 500 µs 0 001 200 mV 500 µs 0 001 MHz 00 mV E 00 µs 0 001 MHz ...
Page 106: ...1 ...
Page 110: ...A2 Logic Circuit Board Assembly jQ798i 798 jc743 CR744t uni R724 R742 JL744S FrR796 ...
Page 113: ......
Page 114: ...P 0 A2 LOGIC BOARD ...
Page 121: ... A B D t F H J NPR Tj ZWX V A AC M AEA HUM qAZ DEF HJ N P R S T J V V7X y ABM APAI AA 7DI4 ...
Page 129: ......
Page 130: ...4 7D14 DIGITAL COUNTER ...