CHANNEL
I
COLUMN
-> A37
-> A3a
->
B3Ö
■> A33
-> B32
} A3 2
OPS
TO
usoa-e
DPb TO
usoa-3
B37
CHANNEL
I
ROW
cRc>a\
■> A31
->S3Q
TS-8
RfoQB
24
3
K
CHANNEL
2
ROW
CHANNEL 2
COLUMN
INTERNAL TO
5
INTERVAL
BOARD
RbG»8
B.2K
+0.53
I5OK
Q680
Rb84
49.9
K
Rfe74
24.9K
Raes
■>
A3O
TS-¾
T5-IO
■>
B29
->A29
ZK
GRS
READOUT
ENCODING
<Q^>
0371
Summary of Contents for 7D14
Page 4: ...7D14 ...
Page 11: ...Operating Instructions 7D14 Fig 2 1 7D14 front panel controls and connectors 2 2 ...
Page 33: ... 3 13 Fig 3 11 Logic diagram for Zero Cancel Logic stage Circuit Description 7D14 ...
Page 38: ...3 18 Fig 3 16 Time Base and Control circuit detailed block diagram Circuit Description 7D14 ...
Page 44: ...NOTES ...
Page 46: ...NJ Fig 4 1 Electrode configuration for semiconductors in this instrument I ...
Page 68: ...NOTES ...
Page 96: ... 7DI 4 DIGITAL COUNTER UNIT ...
Page 98: ...GRS 0371 BLOCK DIAGRAM ...
Page 99: ......
Page 103: ...0 0 I 200 mV 500 µs 0 001 200 mV 500 µs 0 001 MHz 00 mV E 00 µs 0 001 MHz ...
Page 106: ...1 ...
Page 110: ...A2 Logic Circuit Board Assembly jQ798i 798 jc743 CR744t uni R724 R742 JL744S FrR796 ...
Page 113: ......
Page 114: ...P 0 A2 LOGIC BOARD ...
Page 121: ... A B D t F H J NPR Tj ZWX V A AC M AEA HUM qAZ DEF HJ N P R S T J V V7X y ABM APAI AA 7DI4 ...
Page 129: ......
Page 130: ...4 7D14 DIGITAL COUNTER ...