Solartron Mobrey 3595 4C, User Manual

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Programming the 3595 4C Interface card 3595 4C User Manual Part One
3-6
35952350 (CH03/AA)
3.3 CONTROLLING IMP COMMUNICATION
The Host PC controls IMP communication by accessing RAM Page 0. This page holds 512 bytes of control
and status information for up to 50 IMP devices. Table 3.1 lists the control facilities on RAM Page 0 and the
range of location addresses used for each one. The use of these facilities is described in Section 3.3.1.
The bit functions are described in Section 3.4.
Table 3.1: Control and status areas of RAM Page 0
Location Addresses * Function
000 – 0C7 (r/w) Receive Table
0C8 – 0CE (r/w) Poll Table (Receive Enable)
0CF – 0E7 (r/w Receive Interrupt Table
0E8 – 0ED (r/w) Transmit Control Registers
0EE – 0F7 (r/w) Real-time Calendar and Clock
0F8 – 0FE (r/w) Reserved
0FF (r/w) Page Select
100 – 1FF (w) Interface Control Register
101 – 103 Reserved
102 Unallocated
103 Reserved
104 (r) Operating Mode
105 (r) Extended Error Codes
106 – 10F Unallocated
110 (r) Boot Software Status (in ASCII, e.g. ‘A’)
111 (r) Boot Software Status (in ASCII, e.g. ‘B’)
112 (r) Boot Software Status (in ASCII, e.g. ‘C’)
113 (r) Boot Software Status (in ASCII, e.g. ‘D’)
114 – 11F Reserved for extra software information
120 – 128 (r) Flash Checksum
129 – 140 Reserved
141 – 1FF Unallocated
*
To obtain the actual location addresses used, add these hexadecimal
addresses to the base address