2461Type C User Manual
Racal Instruments
1998
Theory of Operation 3-5
Measurement
System
The measurement block is mainly implemented within an Altera
Erasable Programmable logic Device (EPLD). The Timing Error
Correction (TEC) circuit is external to this.
Referring to the block diagram (Figure 3-2), the measurement
block consists of a high speed front end which takes in Input 1
& 2 after conditioning by the input amplifiers. This front end has
connections to microprocessor data
bus
to allow the micro to
configure the measurement block for the type of measurement
to be taken. The micro also drives the measurement process
by controlling the arming of the start and stop of the
measurement.
After a measurement has taken place, the micro reads the
values in the various counting chains via the data
bus
. The
measurement block uses interrupts to communicate the
various events that occur in the measurement block.
The measurement technique employed is known as the
recipromatic measurement technique. In this technique the
signal and reference are counted simultaneously. This has the
advantage that for signals of less than 10 MHz, accuracy is
maintained because of the large number of counts in the
reference counter. In addition the opening and closing of the
gate is synchronized to the signal which, together with the
Timing Error Correction (TEC) circuit allows higher resolution
equivalent to a 1GHz reference.
In this system, the first edge of the incoming frequency to be
measured (after the
µ
P has armed the start of measurement),
opens the gate and simultaneously allows the signal through to
the input 1 counting chain and the frequency reference through
to the reference counting chain. Both signals are now counted
for the duration of the gate time. The
µ
P determines the length
of the gate time using its on-board timer which is set by the
resolution needed by the operator.
At the end of the gate time, the
µ
P arms the end of
measurement and the next edge of the input signal closes the
gate and the two counting chains stop counting.
In the above description, there are two points at which
resolution is limited by the 10 MHz reference, the opening of
the gate and the closing. To overcome this limitation, the time
between the signal opening the gate and the next edge of the
reference, is detected by logic gates in the front end.
Additionally, a pulse whose width is proportional to this time is
generated. This pulse is now used to charge a capacitor from
a constant current source so the charge on the capacitor is
proportional the time error. The charge is then discharged at a
much slower rate and while this is going on the reference is
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