REL1.3
Page 51 of 80
RZ/G1M/G1N Qseven SOM Hardware User Guide
iWave Systems Technologies Pvt. Ltd.
Pin
No
Signal Name
CPU Ball Name/
Pin Number
Signal Type/
Termination
Description
45
CAN1_RX(GP4_31)
SIM0_D/
R27
I, 3.3V CMOS
Receive input for CAN Channel1.
46
LBSC_A4
1
A4/MD24/
W4
O, 3.3V CMOS/
100K PU
Low Bus State Controller Address
bit4.
47
WE1#(GP1_22/MD4)
1
WE1#/MD4/
N6
I, 3.3V CMOS/
10K PD
Low Bus State Controller Write
Enable.
48
GND
NA
Power
Ground.
49
CLKOUT
NC
NA
Default NC.
Note:
CLKOUT
is
optionally
connected to this pin through
resistor and default not populated.
50
SSI_SCK34(GP2_9)
SSI_SCK34/
W27
IO, 3.3V CMOS
Audio Serial clock for channel 3 and
channel 4.
51
RD/WR#(GP1_20)
RD/WR#/
N4
O, 3.3V CMOS
Low Bus State Controller Ready
Status.
52
SSI_WS34(GP2_10)
SSI_WS34/
W26
IO, 3.3V CMOS
Audio Word select for channel 3 and
channel 4.
53
EX_WAIT0(GP1_23)
EX_WAIT0/
U3
I, 3.3V CMOS
Low Bus State Controller wait state
insertion pin.
54
SSI_SDATA3(GP2_11)
SSI_SDATA3/
W25
IO, 3.3V CMOS
Audio Serial data for channel 3.
55
WE0#(GP1_21/MD6)
1
WE0#/MD6/
N5
O, 3.3V CMOS/
10K PD
Low Bus State Controller write
enable signal.
56
SSI_SDATA4(GP2_14)
SSI_SDATA4/
Y29
O, 3.3V CMOS
Audio Serial data for channel 4.
57
CS0#(GP1_10)
CS0#/
T1
O, DIFF
Low Bus State Controller Channel
Select.
58
EX_CS3#(GP1_15/MD9)
1
EX_CS3#/MD9/
V3
O, 3.3V CMOS/
100K PU
Low Bus State Controller channel
select 3.
59
GND
NA
Power
Ground.
60
PWM1(GP1_17/MD8)
1
EX_CS5#/MD8/
V5
O, 3.3V CMOS/
100K PU
Pulse Width Modulated Output 1.
61
EX_CS0#(GP1_12)
EX_CS0#/
V1
I, 3.3V CMOS
Low Bus State Controller channel
select 0.
62
HSCIF1_HTX1(GP7_15)
IRQ5/
AC28
O, 3.3V CMOS
High Speed Serial Communication
Interface (HSCIF1) Serial Data
Transmitter.
63
MSIOF1_TXD/HCTS1#(GP7
_17)
IRQ7/
AB26
O, 3.3V CMOS
SPI transmit data output (or) High
Speed
Serial
Communication
Interface (HSCIF1) ready to send
handshake signal.
