iWave iW-RainboW-G20M, Hardware User'S Manual

Page: 27 / 80

REL1.3
Page 27 of 80
RZ/G1M/G1N Qseven SOM Hardware User Guide
iWave Systems Technologies Pvt. Ltd.
Pin
No.
Qseven Edge
Connector
Pin Name
Signal Name
CPU Ball Name/
Pin Number
Signal Type/
Termination
Description
33 SATA_ACT# NC NA - Default NC.
Note: GP5_11 is optionally
connected to this pin (for
GPIO_SATA_ACT) through resistor
and default not populated.
Note: Same signal is connected to
Qseven edge connector 156
th
Pin
through resistor and default
populated.
34 GND GND NA Power Ground.
35 S NC NA - Default NC.
Note: RIDP0_SATA & RIDP1_SATA
is optionally connected to this pin
(for SATA_RXP) through 0.01uF AC
Coupling Capacitor and default
not populated.
36 S NC NA - NC.
37 SATA0_RX- NC NA - Default NC.
Note: RIDN0_SATA & RIDN1_SATA
is optionally connected to this pin
(for SATA_RXN) through 0.01uF
AC Coupling Capacitor and default
not populated.
38 SATA1_RX- NC NA - NC.
39 GND GND NA Power Ground.
40 GND GND NA Power Ground.
41 BIOS_DISABL
E#/
BOOT_ALT# NC NA - NC.
42 SDIO_CLK# SD2_CLK(GP6_8
) SD2_CLK/
AL14 O, 3.3V CMOS/
1K PU SD1 clock.
43 SDIO_CD# SD2_CD(GP6_14
) SD2_CD/
AJ14 I, 3.3V CMOS/
10K PU SD1 card detect.
44 SDIO_LED GPIO_SD1_LED
(GP1_14) EX_CS2#/
N2 O, 3.3V CMOS SD1 LED indication.
Note: GP1_14 is connected to this
pin as GPIO for implementing SDIO
LED indication.
45 SDIO_CMD SD2_CMD(GP6_
9) SD2_CMD/
AH14 IO, 3.3V CMOS/
10K PU SD1 command.
46 SDIO_WP SD2_WP(GP6_1
5) SD2_WP /
AF14 I, 3.3V CMOS/
10K PU SD1 write Protect.