REL1.3
Page 35 of 80
RZ/G1M/G1N Qseven SOM Hardware User Guide
iWave Systems Technologies Pvt. Ltd.
Pin
No.
Qseven Edge
Connector
Pin Name
Signal Name
CPU Ball Name/
Pin Number
Signal Type/
Termination
Description
165
GND
GND
NA
Power
Ground.
166
GND
GND
NA
Power
Ground.
167
P
NC
NA
-
NC.
168
P
NC
NA
-
NC.
169
PCIE2_TX-
NC
NA
-
NC.
170
PCIE2_RX-
NC
NA
-
NC.
171
UART0_TX
SCIFB1_TXD(GP
7_12)
IRQ2/
AD29
O, 3.3V CMOS
Serial Communication Interface
(SCIFB1) Serial Data Transmitter.
172
UART0_RTS# SCIFB1_RTS#(GP
7_9)
HRTS1#/
U28
O, 3.3V CMOS
Serial Communication Interface
(SCIFB1)
ready
to
receive
handshake signal.
173
P
NC
NA
-
NC.
174
P
NC
NA
-
NC.
175
PCIE1_TX-
NC
NA
-
NC.
176
PCIE1_RX-
NC
NA
-
NC.
177
UART0_RX
SCIFB1_RXD(GP
7_10)
IRQ0/
AE30
I, 3.3V CMOS
Serial Communication Interface
(SCIFB1) Serial Data Receiver.
178
UART0_CTS# SCIFB1_CTS#(GP
7_8)
HCTS1#/
U29
I, 3.3V CMOS
Serial Communication Interface
(SCIFB1) ready to send handshake
signal.
179
P
PCIe1_TXP
TODP1_SATA/
AL25
O, DIFF/
0.1uF AC
coupled
PCIe
Transmit
data
output
positive.
180
P
PCIe1_RXP
RIDP1_SATA/
AL23
I, DIFF
PCIe Receive data input positive.
181
PCIE0_TX-
PCIe1_TXN
TODN1_SATA/
AL26
O, DIFF/
0.1uF AC
coupled
PCIe
Transmit
data
output
negative.
182
PCIE0_RX-
PCIe1_RXN
RIDN1_SATA/
AL24
I, DIFF
PCIe Receive data input negative.
183
GND
GND
NA
Power
Ground.
184
GND
GND
NA
Power
Ground.
185
LPC_AD0/
GPIO0
Q7_GPIO0_(GP2
_12)
SSI_SCK4/
Y31
IO, 3.3V CMOS
General purpose input/output 0.
186
LPC_AD1/
GPIO1
Q7_GPIO1_(GP2
_20)
SSI_SDATA6/
AA29
IO, 3.3V CMOS
General purpose input/output 1.
187
LPC_AD2 /
GPIO2
Q7_GPIO2_(GP2
_21)
SSI_SCK78/
AA27
IO, 3.3V CMOS
General purpose input/output 2.
188
LPC_AD3/
GPIO3
Q7_GPIO3_(GP2
_19)
SSI_WS6/
AA30
IO, 3.3V CMOS
General purpose input/output 3.