iWave iW-RainboW-G20M, Hardware User'S Manual

Page: 34 / 80

REL1.3
Page 34 of 80
RZ/G1M/G1N Qseven SOM Hardware User Guide
iWave Systems Technologies Pvt. Ltd.
Pin
No.
Qseven Edge
Connector
Pin Name
Signal Name
CPU Ball Name/
Pin Number
Signal Type/
Termination
Description
145 DP_LANE2-/
TMDS_LANE
0- NC NA - NC.
146 RSVD NC NA - NC.
147 GND GND NA Power Ground.
148 GND GND NA Power Ground.
149 D/
TMDS_LANE
2+ NC NA - NC.
150 HDMI_CTRL_
DAT NC NA - NC.
151 DP_LANE0-/
TMDS_LANE
2- NC NA - NC.
152 HDMI_CTRL_
CLK NC NA - NC.
153 DP_HDMI_H
PD# NC NA - NC.
154 DP_HPD# NC NA - NC.
155 PCIE_CLK_RE
F+ PCIe_REFCLK_D
P NA O, DIFF PCIe differential reference clock
positive from 100Mhz oscillator.
156 PCIE_WAKE# GPIO_PCIe_WA
KE(GP5_11)
VI1_DATA6/
AK3 I, 3.3V CMOS PCIe wake event.
Note: GP5_11 is connected to this
pin as GPIO for implementing PCIe
wake input.
Note: Same signal is optionally
connected
to Qseven edge
connector 33
rd
pin through resistor
and default not populated.
157 PCIE_CLK_RE
F- PCIe_REFCLK_D
N NA O, DIFF PCIe differential reference clock
negative from 100Mhz oscillator.
158 PCIE_RST# GPIO_PCIe_RST(
GP7_19) IRQ9/
AB28 O, 3.3V CMOS PCIe reset.
Note: GP7_19 is connected to this
pin as GPIO for implementing PCIe
reset.
159 GND GND NA Power Ground.
160 GND GND NA Power Ground.
161 P NC NA - NC.
162 P NC NA - NC.
163 PCIE3_TX- NC NA - NC.
164 PCIE3_RX- NC NA - NC.