IDT 89HPES48T12G2, User Manual

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IDT PES48T12G2 Device Overview
PES48T12G2 User Manual 1 - 13 April 5, 2013
Notes
Pin Characteristics
Note: Some input pads of the switch do not contain internal pull-ups or pull-downs. Unused SMBus
and System inputs should be tied off to appropriate levels. This is especially critical for unused control
signal inputs which, if left floating, could adversely affect operation. Also, floating pins can cause a
slight increase in power consumption. Unused Serdes (Rx and Tx) pins should be left floating. Finally,
No Connection pins should not be connected.
Function Pin Name Type Buffer
I/O
Type
Internal
Resistor
1
Notes
PCI Express
Interface PE00RN[3:0] I PCIe
Differential
2
Serial Link
PE00RP[3:0] I
PE00TN[3:0] O
PE00TP[3:0] O
PE01RN[3:0] I
PE01RP[3:0] I
PE01TN[3:0] O
PE01TP[3:0] O
PE02RN[3:0] I
PE02RP[3:0] I
PE02TN[3:0] O
PE02TP[3:0] O
PE03RN[3:0] I
PE03RP[3:0] I
PE03TN[3:0] O
PE03TP[3:0] O
PE04RN[3:0] I
PE04RP[3:0] I
PE04TN[3:0] O
PE04TP[3:0] O
PE05RN[3:0] I
PE05RP[3:0] I
PE05TN[3:0] O
PE05TP[3:0] O
PE06RN[3:0] I
PE06RP[3:0] I
PE06TN[3:0] O
PE06TP[3:0] O
PE07RN[3:0] I
PE07RP[3:0] I
PE07TN[3:0] O
PE07TP[3:0] O
PE08RN[3:0] I
PE08RP[3:0] I
PE08TN[3:0] O
Table 1.11 Pin Characteristics (Part 1 of 3)