HP 8924E, Assembly

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50
5
Chapter 11, B
loc
k Diagrams
A
ssembly Details
N:
\mkt\
M
A
N
UAL
S
\HP892
4C
\AL
R
\b
lkdia
.fb
A32 SPECTRUM ANALYZER
From
To/
J43
J43
17
J42
SA_114.3M
SPECAN_E/I
DAT_SA_RSYN
CLK_SA_RSYN
From
To
From
J41
J41
3
SA_20MREF
1
2
3 4
t
Adjacent Channel Power
Gain and Bandwidth
Adjustment
0,5,10 dB Gain
Scaling
SA_SCP
SWP_STRT
Serial I/O
Control
Log Amp
a
b
c
10
2
1
OOL
Tune/Gain
DAC
4 in1
Synthesizer
4 2
Phase
Loop
Lock
1 MHz BW
11.26 MHz
BPF 20 dB
114.3 MHz
BPF
Cal
b
a
a a
b
b
0, 10,20 dB
Gain -8 +8 dB
t t
t
t
÷
N
J42
8
5
9
6
7
LO/IF/
Demod
(A31)
Reference
(A27) Measurement
Assembly
(A37)
Serial I/O
(A14)
(A32-BD.FB)
1-16
18-20
J43
J43
1,2
4-16
J41
J41
18-20
J42
J42
2
3
4
Filtering
Filtering
Filtering
+12V
-12V
+5V
Gnd
Gnd