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Refer to function block S of A3 Interface Assembly Schematic Diagram in the
HP 8560 E-Series Spectrum Analyzer Component Level Information.
If both HPOS-HLDNG and
are high during the same bucket,
HROSENFELL will also be set high. This indicates that the video signal probably consists of
noise, since it rose and fell during the same period. The HROSENFELL signal is valid only
when the NORMAL ( rosenfell) detector mode is selected.
1. Remove anything connected to the HP 85613 or HP 85633 front-panel INPUT
connector. Press
on the spectrum analyzer and set the controls as follows:
Centerfrequency
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Span . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Sweep time
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5s
Detector mode
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . NORMAL
2. Check LPOS-RST and
as described in “Peak Detector Reset.”
3. Check
pin 4 for two low-going 3.3
pulses 40
apart occurring every 130
4. Check that HROSENFELL
pin 6) has two pulses spaced approximately
40
apart and then a third pulse 60
from the second pulse. Each pulse should be
approximately 10
wide and low-going.
5. Monitor HROSENFELL with an oscilloscope while reducing the video bandwidth from
1 MHz to 1
6. As the video bandwidth is decreased to 1
the HROSENFELL line should increasingly
show
low logic level. With a video bandwidth of 1
a nearly flat line should be
displayed on the CRT.
7. Set the sweep time to 50 ms. Externally trigger the oscilloscope using the spectrum
analyzer rear-panel BLKG/GATE OUTPUT.
8. Check that HPOS-HLDNG
pin 4) is mostly high with a 1 MHz video bandwidth
and mostly low with a 1
video bandwidth.
9. Check that LNEG-HLDNG
pin 13) is mostly high with a 1 MHz video bandwidth
and mostly low with a 1
video bandwidth.
Refer to function block AA of A3 Interface Assembly Schematic Diagram in the
HP 8560 E-Series Spectrum Analyzer Component Level Information.
The ADC MUX switches various inputs into the video path for conversion by the ADC.
The SCAN RAMP input is used during sweeps having
of equal to or greater than
2.01 MHz times N, to control the timing of the ADC operations. Some combination of
MOD-VIDEO, NEG-PEAK, and POS-PEAK is used for the video signal to be converted by
the ADC. The YTO ERR, FCMUX, CAL OSC TUNE, and OFL ERR inputs are used only
during diagnostic and auto adjust routines and during retrace.
Section 8-21
Summary of Contents for 8562E
Page 21: ...A l HP 85623 Interconnect Block Diagram A 5 Contents 14 ...
Page 205: ...8560E Series sl131e FIGURE 5 3 PARTS IDENTIFICATION MAIN CHASSIS v ...
Page 219: ...FL 4 Bl Figure 6 9 Rear View BTl A20 SK162 Major Assembly and Cable Locations 6 l1 ...
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