To detect bus contention
In this setup, the trigger occurs only if both devices assert their bus transfer
acknowledge lines at the same time.
1
Go to the timing analyzer’s Trigger menu.
2
Define the Edge1 term to represent assertion of the bus transfer
acknowledge line of one device, and Edge2 term to represent
assertion of the bus transfer acknowledge line of the other device.
You can rename these to BTACK1 and BTACK2.
3
Under Timing Sequence Levels, enter the following sequence
specification:
•
TRIGGER on "BTACK1
•
BTACK2" Occurs "1" Else on "no state" go to
level "1"
Triggering on bus contention
Single-Machine Trigger Examples
To detect bus contention
5-21
Summary of Contents for 1660CS
Page 5: ...Introduction iv ...
Page 16: ...1 Logic Analyzer Overview ...
Page 24: ...2 Connecting Peripherals ...
Page 33: ...2 10 ...
Page 34: ...3 Using the Logic Analyzer ...
Page 55: ...3 22 ...
Page 56: ...4 Using the Trigger Menu ...
Page 75: ...4 20 ...
Page 76: ...5 Triggering Examples ...
Page 109: ...5 34 ...
Page 110: ...6 File Management ...
Page 119: ...6 10 ...
Page 120: ...7 Reference ...
Page 221: ...7 102 ...
Page 222: ...8 System Performance Analysis SPA Software ...
Page 241: ...SPA Time Interval System Performance Analysis SPA Software SPA measurement processes 8 20 ...
Page 252: ...9 Concepts ...
Page 284: ...10 Troubleshooting ...
Page 298: ...11 Specifications ...
Page 311: ...11 14 ...
Page 312: ...12 Operator s Service ...
Page 324: ...Troubleshooting Flowchart 2 Troubleshooting To use the flowcharts 12 13 ...
Page 337: ...Glossary 4 ...