Freescale Semiconductor MCF52230 ColdFire, Reference Manual

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Enhanced Multiply-Accumulate Unit (EMAC)
MCF52235 ColdFire® Integrated Microcontroller Reference Manual, Rev. 6
Freescale Semiconductor 4-9
Figure 4-7 and Figure 4-8 show relative alignment of input operands, the full 64-bit product, the resulting
40-bit product used for accumulation, and 48-bit accumulator formats.
Figure 4-7. Fractional Alignment
Figure 4-8. Signed and Unsigned Integer Alignment
Therefore, the 48-bit accumulator definition is a function of the EMAC operating mode. Given that each
48-bit accumulator is the concatenation of 16-bit accumulator extension register (ACCext
n ) contents and
32-bit ACC n contents, the specific definitions are:
if MACSR[6:5] == 00 /* signed integer mode */
Complete Accumulator[47:0] = {ACCext n [15:0], ACC n [31:0]}
if MACSR[6:5] == 01 or 11 /* signed fractional mode */
Complete Accumulator [47:0] = {ACCext n [15:8], ACC n [31:0], ACCext n [7:0]}
if MACSR[6:5] == 10 /* unsigned integer mode */
Complete Accumulator[47:0] = {ACCext n [15:0], ACC n [31:0]}
The four accumulators are represented as an array, ACC n , where n selects the register.
X
OperandY
OperandX
Product
Extended Product
Accumulator
8
Extension Byte Upper [7:0]
+
0
32
40
40
8
40
Extension Byte Lower [7:0]
32
23
8
Accumulator [31:0]
X
OperandY
OperandX
Product
Extended Product
Accumulator
32
32
32
32
32
8
8
8
24
8
8
+
Extension Byte Upper [7:0]
Extension Byte Lower [7:0]
Accumulator [31:0]
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