I
2
C Interface
27-10
Freescale Semiconductor
MCF52235 ColdFire® Integrated Microcontroller Reference Manual, Rev. 6
Figure 27-10. Repeated START
Various combinations of read/write formats are then possible:
•
The first example in
is the case of master-transmitter transmitting to slave-receiver.
The transfer direction is not changed.
•
The second example in
is the master reading the slave immediately after the first byte.
At the moment of the first acknowledge, the master-transmitter becomes a master-receiver and the
slave-receiver becomes slave-transmitter.
•
, START condition and slave address are repeated using the
repeated START signal. This is to communicate with same slave in a different mode without
releasing the bus. The master transmits data to the slave first, and then the master reads data from
slave by reversing the R/W bit.
Figure 27-11. Data Transfer, Combined Format
1
2
3
4
5
6
7
8
1
2
5
6
7
8
3
4
AD7 AD6 AD5 AD4 AD3 AD2 AD1 R/W
AD7 AD6 AD5 AD4 AD3 AD2 AD1 R/W
9
9
XX
New Calling Address
R/W
No
ACK
Bit
STOP
Signal
Repeated
START
Signal
ACK
Bit
R/W
Calling Address
START
msb
lsb
msb
lsb
Signal
A
I2C_SCL
I2C_SDA
ST
A
7bit Slave Address
0
A
Data
Data
A/A
R/W
SP
From Master to Slave
From Slave to Master
ST
A
7bit Slave Address
1
A
Data
A
R/W
SP
ST
A
1
A
Data
R/W
Rept
A
7-bit Slave
0
A
Data
Data
A/A
R/W
SP
ST
Address
7-bit Slave
Address
Example 1:
Example 2:
Example 3:
Master Reads from Slave
Master Writes to Slave
Note: No acknowledge on the last byte
Data
ST = Start
SP = Stop
A = Acknowledge (
I2C_
SDA low)
A = Not Acknowledge (
I2C_
SDA high)
Rept ST = Repeated Start
Because
of
an
order
from
the
United
States
International
Trade
Commission,
BGA-packaged
product
lines
and
part
numbers
indicated
here
currently
are
not
available
from
Freescale
for
import
or
sale
in
the
United
States
prior
to
September
2010:MCF52234CVM60,
MCF52235CVM60
