Plexus 9000 Planning and Engineering Guide
Voice Server Modules
Section 130-120-700
Issue 2, June 4, 2004
Telica, Inc.
5-171
5.15.3 Theory
of
Operation
Each Voice Server module has on-board circuitry to take 2016 or 2688
channels of voice traffic to/from the Time-Division Multiplexing (TDM)
network and transmit/receive packetized voice to the packet/ATM network
via the ATM Network Access module. See
for a block
diagram of the Voice Server module.
P479-AA
03-15-02
Par/
Ser
Interf.
TSU
FSU
TDM
(UTOPIA II)
(UTOPIA I)
PCI
SRAM
AAL5
SAR
MLBA
FLASH
PROCESSOR
SDRAM
MEMORY/BUS
CONTROLLER
CLOCKS
CONTROLLER
MP
Clocks
SRAM
M
I
D
P
L
A
N
E
SRAM
LOCAL BUS
SLAVE
ADDRESS
BUFFER
DATA
BUFFER
SDRAM
VOICE
PROCESSORS
Figure 5.15-2. Voice Server Module Block Diagram
5.15.3.1
Microprocessor and Memory
The processor section has a microprocessor with 1-Mbytes of SRAM for L2
caching, a microprocessor controller and 256 Mbytes of SDRAM and 64
Mbytes of Flash memory for controlling the module. Each module also has
an EEPROM that contains the CLEI code for the module.
5.15.3.2
Local Bus Slave (LBS)
The LBS provides the interface between the microprocessor and its
controller and the voice processor circuitry.