Chapter 10 INTERFACE SETTINGS
473
10.17. Relationships between the pattern drawing bit length,
the dividing mode and the dot clock frequency
There are dependence relationships between the pattern drawing bit length (color depth), the dot clock operation
mode (Dotclk Mode), and the dot clock frequency. Pattern drawing bit lengths, dot clock operation modes and dot
clock frequencies outside the limits of these relationships cannot be set. These relationships also differ depending
on the output video bit length of each unit. They are shown in the following figures.
10.17.1. HDMI Unit
The dot clock frequency is restricted by the pattern drawing bit length (Color Depth) and the dividing mode (Split
Count) as shown in the figure below. Data skipping occurs when the output video bit length (Video Width) at this
time is less than the pattern drawing bit length (Color Depth).
1) When the output video bit length (video width) is 8-bit.
25M
300M
300M
300M
240M
Single Clock Mode
25M
25M
25M
13/14/15/16Bit
11/12Bit
9/10Bit
8Bit
ColorDepth
400MHz
0.1MHz
800MHz
1200MHz
1360MHz
1000MHz
600MHz
200MHz
The data is rounded off.
50M
600M
600M
600M
480M
50M
50M
50M
Dual Clock Mode
13/14/15/16Bit
11/12Bit
9/10Bit
8Bit
ColorDepth
400MHz
0.1MHz
800MHz
1200MHz
1360MHz
1000MHz
600MHz
200MHz
The data is rounded off.
100M
1200M
1200M
1200M
960M
100M
100M
100M
Quad Clock Mode
13/14/15/16Bit
11/12Bit
9/10Bit
8Bit
ColorDepth
400MHz
0.1MHz
800MHz
1200MHz
1360MHz
1000MHz
600MHz
200MHz
The data is rounded off.
Summary of Contents for VG-876
Page 1: ...Video Signal Generator VG 876 Instruction Manual Ver 3 40 ...
Page 2: ......
Page 30: ...16 ...
Page 57: ...Chapter 3 TIMING DATA SETTINGS 43 ...
Page 103: ...Chapter 4 PATTERN SETTINGS 89 1 2 3 4 5 6 0 ...
Page 134: ...120 GUI Display Selected port ...
Page 135: ...Chapter 4 PATTERN SETTINGS 121 HEX Display Selected port ...
Page 143: ...Chapter 4 PATTERN SETTINGS 129 ...
Page 177: ...Chapter 6 HDCP SETTINGS AND EXECUTION 163 ...
Page 205: ...Chapter 7 VG 876 SYSTEM SETTINGS 191 ...
Page 223: ...Chapter 8 DATA COPYING ERASING 209 ...
Page 237: ...Chapter 9 USEFUL FUNCTIONS 223 ...
Page 336: ...322 10 5 3 Data transfer method Normal MODE 2Lane output ...
Page 338: ...324 Normal MODE 4Lane output ...
Page 376: ...362 Assignment of each lane ...
Page 378: ...364 Assignment of each lane Lane 1 4 Lane 9 12 Lane 5 8 Lane 13 16 ...
Page 380: ...366 Assignment of each lane Lane1 4 Lane9 12 Lane5 8 Lane 13 16 ...
Page 382: ...368 Assignment of each lane Lane1 8 Lane9 16 ...
Page 384: ...370 Assignment of each lane Lane1 8 Lane9 16 ...
Page 386: ...372 Assignment of each lane Lane1 8 Lane9 16 ...
Page 388: ...374 Assignment of each lane Lane1 4 Lane9 12 Lane5 8 Lane 13 16 ...
Page 390: ...376 Assignment of each lane Lane1 4 Lane9 12 Lane5 8 Lane 13 16 ...
Page 392: ...378 Assignment of each lane Lane1 16 ...
Page 453: ...Chapter 10 INTERFACE SETTINGS 439 Connection figure of VM 1876 MX s ...
Page 464: ...450 Reverse Mode Top Bottom Reverse Mode LR TB ...
Page 466: ...452 Reverse Mode Top Bottom Reverse Mode LR TB ...
Page 468: ...454 Reverse Mode Top Bottom Reverse Mode LR TB ...
Page 495: ...Chapter 10 INTERFACE SETTINGS 481 2 When Video Width is 8 bit ...
Page 496: ...482 3 When Video Width is 10 bit ...
Page 501: ...Chapter 10 INTERFACE SETTINGS 487 2 When iTMDS output ...
Page 504: ......
Page 538: ...524 ...