Chapter 10 INTERFACE SETTINGS
467
10.12.9. HDMI 6G HDCP2.2 unit
HDMI
CH1
CH2
Connector
HDMI×2
Dot Clock
*1
Single Clock Mode
<RGB/YCbCr444>
8bit
:
25 - 300MHz
10bit
:
25 - 240MHz
12bit
:
25 - 200MHz
16bit
:
25 - 150MHz
<YCbCr422>
8bit
:
25 - 300MHz
10bit
:
25 - 300MHz
12bit
:
25 - 300MHz
Dual Clock Mode
*2
<RGB/YCbCr444>
8bit
:
597MHz
<YCbCr422>
12bit
:
597MHz
<YCbCr420>
8bit
:
50 - 600MHz
10bit
:
50 - 480MHz
12bit
:
50 - 400MHz
16bit
:
50 - 300MH
z
Number of colors
Generated
*3, *4
RGB each 8 / 10 / 12bit / 16bit
(RGB / YCbCr444 / YCbCr422 / YCbCr420 supported.)
Audio
Out
HDMI
L-PCM
Sampling: 32K / 44.1K / 48K / 88.2K / 96K / 176.4K / 192K
Output Frequency: 100 - 20KHz
Bit number: 16 / 20 / 24bit
Com-
pressed
AC3, AAC
Option
Next generation audio
DSD, Dolby Digital Plus, Dolby True HD,
DTS HD
(
High Resolution Audio
)
, DTS HD
(
Master Audio
)
Copy protection
HDCP Ver2.2 or Ver1.4
Other functions
E-EDID Ver1.4
(
DDC2B
)
, xvYCC, CEC
*1 Quad Clock Mode is not supported.
*2 The same data is output from CH1 and CH2. However, it does not support split mode.
*3 In case of YCbCr4:2:0, it supports up to 8-bit.
*4 4K output supports up to 12-bit.
Summary of Contents for VG-876
Page 1: ...Video Signal Generator VG 876 Instruction Manual Ver 3 40 ...
Page 2: ......
Page 30: ...16 ...
Page 57: ...Chapter 3 TIMING DATA SETTINGS 43 ...
Page 103: ...Chapter 4 PATTERN SETTINGS 89 1 2 3 4 5 6 0 ...
Page 134: ...120 GUI Display Selected port ...
Page 135: ...Chapter 4 PATTERN SETTINGS 121 HEX Display Selected port ...
Page 143: ...Chapter 4 PATTERN SETTINGS 129 ...
Page 177: ...Chapter 6 HDCP SETTINGS AND EXECUTION 163 ...
Page 205: ...Chapter 7 VG 876 SYSTEM SETTINGS 191 ...
Page 223: ...Chapter 8 DATA COPYING ERASING 209 ...
Page 237: ...Chapter 9 USEFUL FUNCTIONS 223 ...
Page 336: ...322 10 5 3 Data transfer method Normal MODE 2Lane output ...
Page 338: ...324 Normal MODE 4Lane output ...
Page 376: ...362 Assignment of each lane ...
Page 378: ...364 Assignment of each lane Lane 1 4 Lane 9 12 Lane 5 8 Lane 13 16 ...
Page 380: ...366 Assignment of each lane Lane1 4 Lane9 12 Lane5 8 Lane 13 16 ...
Page 382: ...368 Assignment of each lane Lane1 8 Lane9 16 ...
Page 384: ...370 Assignment of each lane Lane1 8 Lane9 16 ...
Page 386: ...372 Assignment of each lane Lane1 8 Lane9 16 ...
Page 388: ...374 Assignment of each lane Lane1 4 Lane9 12 Lane5 8 Lane 13 16 ...
Page 390: ...376 Assignment of each lane Lane1 4 Lane9 12 Lane5 8 Lane 13 16 ...
Page 392: ...378 Assignment of each lane Lane1 16 ...
Page 453: ...Chapter 10 INTERFACE SETTINGS 439 Connection figure of VM 1876 MX s ...
Page 464: ...450 Reverse Mode Top Bottom Reverse Mode LR TB ...
Page 466: ...452 Reverse Mode Top Bottom Reverse Mode LR TB ...
Page 468: ...454 Reverse Mode Top Bottom Reverse Mode LR TB ...
Page 495: ...Chapter 10 INTERFACE SETTINGS 481 2 When Video Width is 8 bit ...
Page 496: ...482 3 When Video Width is 10 bit ...
Page 501: ...Chapter 10 INTERFACE SETTINGS 487 2 When iTMDS output ...
Page 504: ......
Page 538: ...524 ...