Ziatech Corporation ZT 8809A, Руководство по эксплуатации

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ZT 88CT08A/88CT09A CMOS Boards
The mechanism used to stop and restart the processor clock is part of
the 82C85 clock chip, which is supplied only on the ZT 88CT08A
and ZT 88CT09A boards. This chip monitors the status lines from the
CPU. When a processor halt status is seen on those status lines, the
82C85 halts its clock output. This in turn stops the processor. When
an interrupt is seen out of the 82C59A Programmable Interrupt
Controller on board, the 82C85 then restarts the clock. To the
programmer, the order of events is as follows:
1. Initialize the Programmable Interrupt Controller (8259A).
2. Initialize the pointer to the Interrupt Service Routine.
3. Be sure the event to restart the processor is initialized.
4. Enable processor interrupts.
5. Execute a processor halt instruction.
The latency between the time the interrupt occurs and the time the
processor clock restarts is approximately 80 clock cycles. Add to this
the time required for jumping to the interrupt service routine, which is
about 15 clock cycles. This translates to about 19 milliseconds for a
ZT 88CT08A and to about 11.8 milliseconds for a ZT 88CT09A.
This feature is limited to the ZT 88CT08A and ZT 88CT09A boards,
since it is provided by the 82C85 chip. It is necessary only in a system
where power conservation is of greatest importance and is therefore
limited to the CMOS boards only.
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