Interfaces (IEEE option L45-O1) LMG450
196
10.2.10.12.4 :CHANnels
TRCH
SCPI:
:SENSe:TRANsient:CHANnels <NRi>
SHORT: TRCH <NRi>
ID:
n/a
Mode:
Transient
Type:
long int
Suffix:
n/a
Value:
0...4095, [*RST default value] = 4095
List:
n/a
Unit:
n/a
Group:
n/a
Reads and sets the channels to be watched in the transient mode. The trigger event can just be
defined for a whole group, so you can include (bit set) or exclude (bit reset) the different
channels from searching. Each bit defines one channel:
Bit 0: Channel 1
Bit 1: Channel 2, ....
10.2.10.12.5 :DURation
TDUR
SCPI:
:SENSe:TRANsient:DURation <NRf>[,<NRi>]
SHORT: TDUR <NRf>[,<NRi>]
ID:
n/a
Mode:
Transient
Type:
float
Suffix:
n/a
Value:
2*10
-5
...10, [*RST default value]=2*10
-5
List:
n/a
Unit:
s
Group:
optional [,<NRi>], 0=A, 1=B
Reads and sets the duration of the event.
10.2.10.12.6 :OCRegister
TOCR
SCPI:
:SENSe:TRANsient:OCRegister <NRi>[,<NRi>]
SHORT: TOCR <NRi>[,<NRi>]
ID:
n/a
Mode:
Transient
Type:
long int
Suffix:
n/a
Value:
0...127, [*RST default value] = 0
List:
n/a
Unit:
n/a
Group:
optional [,<NRi>], 0=A, 1=B
Reads and sets the OR Condition Register:
Bit 0: Slewrate condition is checked if bit is set
Bit 1: Win In condition is checked if bit is set
Bit 2: Win Out condition is checked if bit is set
Bit 3: >Limit1 condition is checked if bit is set
Bit 4: <Limit1 condition is checked if bit is set
Bit 5: >Limit2 condition is checked if bit is set
Bit 6: <Limit2 condition is checked if bit is set
10.2.10.12.7 :PRETrigger
TPRE
SCPI:
:SENSe:TRANsient:PRETrigger <NRf>
Содержание LMG450
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Страница 270: ...System design LMG450 270 14 2 Functional block diagram LMG450 Figure 47 Functional block diagram LMG450...
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