ZES ZIMMER LMG450, Руководство пользователя

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Z E S ZIMMER Electronic Systems GmbH Chapter 10
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:OCRegister
:PRETrigger
:RTIMe
:SIGNal
:SRDT
:SRDY
:SROVer
10.2.10.12.1 :ACRegister TACR
SCPI: :SENSe:TRANsient:ACRegister <NRi>[,<NRi>]
SHORT: TACR <NRi>[,<NRi>]
ID: n/a Mode: Transient
Type: long int Suffix: n/a
Value: 0...127, [*RST default value] = 0 List: n/a
Unit: n/a Group: optional [,<NRi>], 0=A, 1=B
Reads and sets the AND Condition Register:
Bit 0: Slewrate condition is checked if bit is set
Bit 1: Win In condition is checked if bit is set
Bit 2: Win Out condition is checked if bit is set
Bit 3: >Limit1 condition is checked if bit is set
Bit 4: <Limit1 condition is checked if bit is set
Bit 5: >Limit2 condition is checked if bit is set
Bit 6: <Limit2 condition is checked if bit is set
10.2.10.12.2 :ALIMit TLIA
SCPI: :SENSe:TRANsient:ALIMit <NRf>[,<NRi>]
SHORT: TLIA <NRf>[,<NRi>]
ID: n/a Mode: Transient
Type: float Suffix: n/a
Value:
±
1e9, [*RST default value] = 0
List: n/a
Unit: n/a Group: optional [,<NRi>], 0=A, 1=B
Reads and sets the limit 1.
10.2.10.12.3 :BLIMit TLIB
SCPI: :SENSe:TRANsient:BLIMit <NRf>[,<NRi>]
SHORT: TLIB <NRf>[,<NRi>]
ID: n/a Mode: Transient
Type: float Suffix: n/a
Value:
±
1e9, [*RST default value] = 0
List: n/a
Unit: n/a Group: optional [,<NRi>], 0=A, 1=B
Reads and sets the limit 2.