Toshiba TMPR7901, Руководство пользователя

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Chapter 14: UARTS WITH FIFOS
TX7901 User’s Manual (Rev. 6.30T – Nov, 2001)
14-11
RXRDY – Mode 1: Becomes active (Low) when the RX FIFO Trigger Level or Timeout
occurs. Becomes inactive when the RX FIFO is empty.
14.4.6.5 RTFL0, 1 – Receive FIFO Trigger Level
Table 14-8 lists the programmable trigger levels at which the amount of received data in the
Receive FIFO will trigger an interrupt to service the FIFO.
Table 14-8 Receive FIFO Trigger Levels
RFTL1 RFTL0 RX FIFO Trigger Level (Bytes)
0 0 01
0 1 04
1 0 08
1 1 14
14.4.7 Interrupt Identification Registers (IIR0, IIR1)
Table 14-9 lists the fields of the Interrupt Identification Registers, and Table 14-10 lists the
interpretation of the fields of these registers.
Table 14-9 Fields of Interrupt Identification Registers
Bit(s) Read Comment
6, 7 FIFOE Returns “1” if FIFOs enabled, otherwise “0.”
4, 5 0 Always returns “0.”
3 ID2 Interrupt ID Bit 2. Returns “0” if FIFOs disabled.
2 ID1 Interrupt ID Bit 1
1 ID0 Interrupt ID Bit 0
0 NINT No interrupt pending
Table 14-10 Interpretation of the fields of the Interrupt Identification Registers
ID2 ID1 ID0 NINT Priority Comment
0 0 0 1 – No Interrupt Pending
0 1 1 0 1 Rx Line Status
0 1 0 0 2 Receive Data Available or RX FIFO Trigger
1 1 0 0 2 Character Timeout Indication
0 0 1 0 3 TX Holding Register Empty
0 0 0 0 4 Modem Status
Pending Interrupts are cleared by the following actions:
Priority 1) Reading Line Status Register
Priority 2) Reading RX Buffer Register
Priority 3) Reading the IIR register if an event is a priority 3 interrupt, OR writing to
the TX Holding Register