Toshiba TMPR7901, Руководство пользователя

Страница: 212 / 309

Chapter 12: 10/100 IEEE802.3 Media Access Controller
TX7901 User’s Manual (Rev. 6.30T – Nov, 2001)
12-4
12.2 MII (Medium Independent Interface)
Table 12-1 lists the Medium Independent Interface Signals.
Table 12-1 MII Interface Signals
Signal
Input /
Output
Description
macxTxClk Input
Transmit Clock. Provides the timing reference for the transfer
of the macxTxEn, macxTxD, and macxTxEr to the PHY.
macxTxEn Output
Transmit Enable. When High, indicates the presence of
nibbles on the MII for transmission. Asserted with the first
nibble of the preamble, and remains asserted until all nibbles
have been transmitted to the MII. Synchronous with the rising
edge of macxTxClk.
macxTxD[3:0] Output
Transmit Nibble Data. Synchronous with the rising edge of
macxTxClk.
macxTxEr Output
Transmit Coding Error. When macxTxEr is asserted for one or
more macxTxClk periods while macxTxEn is also asserted,
this signal indicates that one or more symbols that are not part
of the valid data in the frame are being transmitted.
Synchronous with the rising edge of macxTxClk.
macxRxClk Input
Receive clock. Provides the timing reference for the transfer of
the macxRxDv, macxRxD and macxRxEr from the PHY.
macxRxDV Input
Receive Data Valid. When asserted, indicates that the PHY is
presenting recovered and decoded nibbles on macxRxD[3:0].
Remains asserted continuously from the first nibble through
the final nibble of the frame. Synchronous with the rising edge
of macxRxClk.
macxRxD[3:0] Input
Receive Nibble Data. Synchronous with the rising edge of
macxRxClk.
macxRxEr Input
Receive Error. When asserted for one or more macxRxClk
periods, indicates that an error was detected somewhere in the
frame presently being transferred from the PHY to the MII.
Synchronous with the rising edge of macxRxClk.
macxCRS Input
Carrier Sense. macxCRS should be asserted when either the
transmit or receive medium is active, and de-asserted when
both are idle. Asynchronous to macxRxClk
macxCOL Input
Collision Detected. The PHY should assert macxCOL upon
detection of a collision on the medium, and remain asserted
while the collision condition persists. Asynchronous
macxMDC Output
MII Management Data Clock. Provides timing reference for
transfer of macxMDIO.
macxMDIO Inout
MII management Data Input/Output. Synchronous with the
rising edge of macxMDC.
macxHwFDupSel Input
Full-Duplex Select. Selects the duplex mode when the
HwFDupSelEn bit is set in the Transmit Frame Configuration
Register.
Note: In Table 12-1 “Input” refers to signals that go from G-Bus or MII to MAC, while “Output” refers to signals
that go from MAC to G-Bus or MII.