5-11
Themis Computer
5—Field-Programmable Gate Array (FPGA)
Register Description
5.5.8
SCSI Setting Register
The SCSI Setting register controls the SCSI termination of the TA64 baseboard, and
includes some legacy bit definitions that are not really used in the TA64. These
unused bits are retained to ease migration to future products.
Table 5-8.
SCSI Setting Register 0xFB00.0006
Field
Bit
Access
Description
Status of SB1
Bit 0
RO
SCSI terminator type
1 = SCSI terminator is from Dallas
0 = SCSI terminator is from Unitrode
See
Note 3
, next page.
SCSI-A front panel
sensing
Bit 1
RO
SCSI-A front panel sensing
1 = SCSI-A front panel connected to a SCSI device.
0 = SCSI-A front panel not connected to a SCSI device.
SCSI-A P2 paddle
sensing
Bit 2
RO
SCSI-A P2 paddle sensing
1 = SCSI-A P2 paddle connected to a SCSI device.
0= SCSI-A P2 paddle not connected to a SCSI device.
SCSI-B front panel
sensing
Bit 3
RO
SCSI-B front panel sensing
1 = SCSI-B front panel connected to a SCSI device.
0 = SCSI-B front panel not connected to a SCSI device.
SCSI-A termination
power
Bit 4
RW
SCSI-A termination power
0 = SCSI-A termination power is disabled
1 = SCSI-A termination power is enabled
@ reset: 1
See
Note 2
, next page.
SCSI-B termination
power
Bit 5
RW
SCSI-B termination power
0 = SCSI-B termination power is disabled
1 = SCSI-B termination power is enabled
@ reset: 1
See
Note 2
, next page.
Status of JP8
Bit 6
RO
SCSI-A SE mode
0 = Auto mode. Do not force SCSI-A to work in SE mode
1 = Force SCSI-A to work in SE mode
See
Note 4
, next page.
Reserved
Bit 7
RO
Read as 0
Содержание TA64
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