Themis TA64, Руководство по оборудованию

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Themis Computer
TA64 Hardware Manual
eral to read and write memory without intervention by the CPU. DMA is a lim-
ited form or bus mastering.
DSR : Data set ready (DCE to DTE).
DTE : Data terminal equipment (a computer, terminal, or printer, for example).
DTR : Data terminal ready (DTE to DCE).
DUART : Dual Universal Asynchronous Receiver/Transmitter. See UART
Firmware : This is software that stays with the hardware, usually in a PROM or
similar device.
FPGA: Field-Programmable Gate Array. A gate array where the logic network
can be programmed into the device after its manufacture. An FPGA consists of
an array of logic elements, either gates or lookup table RAMs, flip-flops, and
programmable interconnect wiring.
GBIC: GigaBit Interface Converter. A hardware module used to attach network
devices to fiber-based transmission systems such as Fibre Channel and Gigabit
Ethernet. The GBIC converts serial electrical signals to serial optical signals
and vice versa.
GHz : Gigahertz (billions of cycles per second, 10
9
cps); unit of frequency.
GUI: The use of pictures rather than words to represent both the input and the out-
put of a program. A program with a GUI runs under some windowing system.
HVD : High-Voltage Differential; usually shortened to Differential (see LVD).
Hardware : On the USPII e , the CPU module, cables, and peripheral devices are typ-
ical examples of hardware.
I
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C : Inter-Integrated Circuit
IOM : I/O Module.
ISA : Industry Standard Architecture. A bus architecture used in the IBM PC/XT and
PC/AT .
ISR : In System Reprogrammable (Cypress Semiconductor Corporation).
JTAG : Joint Test Action Group. IEEE Standard 1149.1 for standard test access port
protocol and boundary-scan architecture.
LED : Light-Emitting Diode.