2—TA64 Features and Specifications
Backplane Jumper Settings
2-5
Themis Computer
2.5
Backplane Jumper Settings
In compliance with the VME Specification, the PMC/XMC Carrier Board assures
the continuity between bus grants BG[0..3]IN to BG[0..3]OUT, and the interrupt
acknowledge daisy-chain IACKIN to IACKOUT.
2.6
System Specifications
2.6.1
Processor & Memory Subsystems
Table 2-2
and
Table 2-3
contain processor and memory subsection specifications.
Table 2-2.
Processor Specifications
Feature/Function
Specifications
Processor
AMD Turion64 CPU
Processor Speed
800 MHz / 1.6 GHz
Performance
1.6 GHz
1083 SPECint2000 @ 1.6 GHz (estimate)
1160 SPECfp2000 @ 1.6 GHz (estimate)
L1 Cache (Instr Data)
128 KB (64 KB + 64 KB)
L2 Cache
1 MB
HyperTransport technology
I/O Bandwidth
Up to 6.4 GB/s
16-bit/800-MHz data path from CPU
Table 2-3.
Memory Specifications
Feature/Function
Specifications
Main Memory
Custom Memory Modules from 512 MB to 4 GB
Memory Bus Interface
72 bit Data Path from CPU, including 8 bit ECC
2 to 1 Interleave to SDRAM
13 bit Address Bus
3.3V Level Interface
Memory Modules
DDR-333 SDRAM Custom Memory
(see
Table 2-1
, page 2-3)
Содержание TA64
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