S5PC110_UM
4 REAL TIME CLOCK (RTC)
4-10
4.10.1.2 Real Time Clock Control Register (RTCCON, R/W, Address = 0xE280_0040)
The RTCCON register consists of 10 bits such as the RTCEN, which controls the read/ write enable of the BCD
SEL, CNTSEL, CLKRST, TICCKSEL and TICEN for testing, and CLKOUTEN for RTC clock output control.
RTCEN bit controls all interfaces between the CPU and the RTC, therefore it should be set to 1 in an RTC control
routine to enable data read/ write after a system reset. To prevent inadvertent writing into BCD counter registers
the RTCEN bit should be cleared to 0 before power off.
CLKRST is counter reset for 2
15
clock divider. Before RTC clock setting, 2
15
clock divider must be reset for exact
RTC operation.
RTCCON
Bit
Description
Initial State
Reserved [31:10]
Reserved
0
CLKOUTEN
[9]
Enables RTC clock output on XRTCCLKO pad.
0 = Disables
1 = Enables
0
TICEN [8]
Enables
Tick
timer
0 = Disables
1 = Enables
0
TICCKSEL
[7:4]
Tick timer sub clock selection.
4’b0000 = 32768 Hz 4’b0001 = 16384 Hz
4’b0010 = 8192 Hz 4’b0011 = 4096 Hz
4’b0100 = 2048 Hz
4’b0101 =1024 Hz
4’b0110 =512 Hz 4’b0111 =256 Hz
4’b1000 =128 Hz 4’b1001 =64 Hz
4’b1010 =32 Hz 4’b1011 =16 Hz
4’b1100 =8 Hz 4’b1101 =4 Hz
4’b1110 =2 Hz 4’b1111 =1 Hz
4’b0000
CLKRST
[3]
RTC clock count reset.
0 = RTC counter (2
15
clock divider) enable
1 = RTC counter reset and disable
Note: When RTCEN is enabled, CLKRST affects RTC.
0
CNTSEL
[2]
BCD count select.
0 = Merge BCD counters
1 = Reserved (Separate BCD counters)
Note: When RTCEN is enabled, CNTSEL affects RTC.
0
CLKSEL
[1]
BCD clock select.
0 = XTAL 1/2
15
divided clock
1 = Reserved (XTAL clock only for test)
Note: When RTCEN is enabled, CLKSEL affects RTC.
0
RTCEN
[0]
Enables RTC control.
0 = Disables
1 = Enables
Note: When RTCEN is enabled, you can change the BCD time count
setting, 2
15
clock divider reset, BCD counter select, and BCD clock
select can be performed.
0
Содержание S5PC110
Страница 4: ...Section 1 OVERVIEW ...
Страница 28: ...Section 2 SYSTEM ...
Страница 374: ...S5PC110_UM 4 POWER MANAGEMENT 4 14 4 Let DRAMs exit from self refresh mode ...
Страница 473: ...S5PC110_UM 6 BOOTING SEQUENCE 6 10 Figure 6 3 Secure Booting Diagram ...
Страница 474: ...Section 3 BUS ...
Страница 491: ...S5PC110_UM 2 CORESIGHT Figure 2 4 Structure of the Coresight DAP Components 2 8 ...
Страница 506: ...Section 4 INTERRUPT ...
Страница 537: ...Section 5 MEMORY ...
Страница 540: ......
Страница 703: ...Section 6 DMA ...
Страница 705: ...List of Figures Figure Title Page Number Number Figure 1 1 Two DMA Tops 1 1 ...
Страница 737: ...Section 7 TIMER ...
Страница 795: ...Section 8 CONNECTIVITY STORAGE ...
Страница 883: ...S5PC110_UM 5 USB2 0 HS OTG 5 7 5 6 3 OTG FIFO ADDRESS MAPPING Figure 5 3 OTG FIFO Mapping ...
Страница 1085: ...S5PC110_UM 8 TRANSPORT STREAM INTERFACE 8 12 Figure 8 7 TSI Error Cases with SKIP mode TS_VALID TS_SYNC TS_ERROR is active high ...
Страница 1100: ...Section 9 MULTIMEDIA ...
Страница 1116: ...S5PC110_UM 1 0BDISPLAY CONTROLLER 1 5 Figure 1 2 Block Diagram of the Data Flow ...
Страница 1119: ...S5PC110_UM 1 0BDISPLAY CONTROLLER 1 8 1 3 3 2 1 32BPP 8888 Mode Pixel data contains Alpha value ...
Страница 1125: ...S5PC110_UM 1 0BDISPLAY CONTROLLER 1 14 1 3 3 2 7 16BPP Display 1555 P1 P2 P3 P4 P5 LCD Panel ...
Страница 1145: ...S5PC110_UM 1 0BDISPLAY CONTROLLER 1 34 Figure 1 10 Blending Decision Diagram ...
Страница 1149: ...S5PC110_UM 1 0BDISPLAY CONTROLLER 1 38 Figure 1 14 Hue Control Block Diagram ...
Страница 1184: ...S5PC110_UM 1 0BDISPLAY CONTROLLER 1 73 ...
Страница 1226: ...S5PC110_UM 1 0BDISPLAY CONTROLLER 1 115 ...
Страница 1242: ...S5PC110_UM 1 0BDISPLAY CONTROLLER 1 131 I80IFCONx Bit Description Initial State LDI_CMD 23 0 Specifies the LDI command 0 ...
Страница 1309: ...S5PC110_UM 2 1BCAMERA INTERFACE 2 62 Original Arbitary sepia Negative Art freeze Embossing Silhouette Figure 2 29 Image Effect ...
Страница 1328: ...S5PC110_UM 2 1BCAMERA INTERFACE 2 81 ...
Страница 1369: ...S5PC110_UM 4 3BMIPI CSIS 4 2 4 2 BLOCK DIAGRAM Figure 4 1 MIPI CSI System Block Diagram ...
Страница 1381: ...S5PC110_UM 4 3BMIPI CSIS 4 14 ...
Страница 1400: ...S5PC110_UM 6 5BMULTI FORMAT CODEC 6 8 Figure 6 3 QCIF Image in 16pixel x 16lines 1x1 Tiled Mode ...
Страница 1401: ...S5PC110_UM 6 5BMULTI FORMAT CODEC 6 9 Figure 6 4 QCIF Image in 64pixel x 32lines 4x2 Tiled Mode ...
Страница 1431: ...S5PC110_UM 6 5BMULTI FORMAT CODEC 6 39 ...
Страница 1471: ...S5PC110_UM 6 5BMULTI FORMAT CODEC 6 79 Figure 6 7 VC1 Parameters ...
Страница 1549: ...S5PC110_UM 8 7BVIDEO PROCESSOR 8 15 The guide of configuration Figure 8 5 Examples of Usage Cases ...
Страница 1606: ...S5PC110_UM 9 8BMIXER 9 26 Video layer Graphic layer0 Background layer blend blend blend Graphic laer1 Figure 9 4 Mixer Blending ...
Страница 1626: ...S5PC110_UM 10 9BHIGH DEFINITION MULTIMEDIA INTERFACE 10 17 Figure 10 10 Channel Status Block ...
Страница 1775: ...S5PC110_UM 13 12BG2D 13 6 FIMG 2D FIMG 2D FIMG 2D Figure 13 3 Rotation and Flip Example ...
Страница 1798: ...Section 10 AUDIO ETC ...
Страница 1803: ...S5PC110_UM 1 AUDIO SUBSYSTEM 1 2 Figure 8 7 Keypad I F Block Diagram 8 8 ...
Страница 1819: ...S5PC110_UM 2 IIS MULTI AUDIO INTERFACE 2 2 2 3 BLOCK DIAGRAM OF IIS MULTI AUDIO INTERFACE Figure 2 1 IIS Bus Block Diagram ...
Страница 1951: ...Section 11 SECURITY ...
Страница 1954: ...List of Tables Table Title Page Number Number Table 1 1 Security Features of S5PC110 1 2 ...
Страница 1964: ...S5PC110_UM 2 ADVANCED CRYPTO ENGINE Figure 2 9 DES Byte Swapping Scheme 2 9 ...
Страница 2005: ...Section 12 ETC ...
Страница 2020: ...S5PC110_UM 1 ELECTRICAL DATA 1 6 ONENAND AC ELECTRICAL CHARACTERISTICS Figure 1 6 OneNand Flash Timing 1 13 ...
Страница 2039: ...Section 13 SIZE BALL MAP ...
Страница 2098: ...S5PC110_UM 1 B TYPE SIZE BALL MAP 1 1 6 PACKAGE DIMENSION Figure 1 2 S5PC110 Package Dimension 596 FCFBGA Top View 1 54 ...
Страница 2099: ...S5PC110_UM 1 B TYPE SIZE BALL MAP Figure 1 3 S5PC110 Package Dimension 596 FCFBGA Side View 1 1 ...
Страница 2152: ...S5PC110_UM 2 D TYPE SIZE BALL MAP 2 1 6 PACKAGE DIMENSION Figure 2 2 S5PC110 Package Dimension 596 FCFBGA Top View 2 54 ...
Страница 2153: ...S5PC110_UM 2 D TYPE SIZE BALL MAP Figure 2 3 S5PC110 Package Dimension 596 FCFBGA Side View 2 55 ...
Страница 2207: ...S5PC110_UM 3 E TYPE SIZE BALL MAP 3 1 6 PACKAGE DIMENSION Figure 3 2 S5PC110 Package Dimension 596 FCFBGA Top View 3 54 ...
Страница 2208: ...S5PC110_UM 3 E TYPE SIZE BALL MAP Figure 3 3 S5PC110 Package Dimension 596 FCFBGA Side View 3 55 ...
Страница 2261: ...S5PC110_UM 4 F TYPE SIZE BALL MAP 4 1 6 PACKAGE DIMENSION Figure 4 2 S5PC110 Package Dimension 596 FCFBGA Top View 4 53 ...
Страница 2262: ...S5PC110_UM 4 F TYPE SIZE BALL MAP Figure 4 3 S5PC110 Package Dimension 596 FCFBGA Side View 4 54 ...
Страница 2317: ...S5PC110_UM 5 G TYPE SIZE BALL MAP 5 1 6 PACKAGE DIMENSION Figure 5 2 S5PC110 Package Dimension 596 FCFBGA Top View 5 55 ...
Страница 2318: ...S5PC110_UM 5 G TYPE SIZE BALL MAP Figure 5 3 S5PC110 Package Dimension 596 FCFBGA Side View 5 56 ...
Страница 2356: ...S5PC110_UM 6 H TYPE SIZE BALL MAP 6 38 POP_A OneDRAM A Port Ball Name I O Description POP_CEB_O IO POP_A DRAM Chip Enable ...
Страница 2370: ...S5PC110_UM 6 H TYPE SIZE BALL MAP 6 1 6 PACKAGE DIMENSION Figure 6 2 S5PC110 Package Dimension 596 FCFBGA Top View 6 52 ...
Страница 2371: ...S5PC110_UM 6 H TYPE SIZE BALL MAP Figure 6 3 S5PC110 Package Dimension 596 FCFBGA Side View 6 53 ...
Страница 2425: ...S5PC110_UM 7 I TYPE SIZE BALL MAP 7 1 6 PACKAGE DIMENSION Figure 7 2 S5PC110 Package Dimension 596 FCFBGA Top View 7 54 ...
Страница 2426: ...S5PC110_UM 7 I TYPE SIZE BALL MAP Figure 7 3 S5PC110 Package Dimension 596 FCFBGA Side View 7 55 ...