Samsung S5PC110, Руководство пользователя

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S5PC110_UM 2 ADVANCED CRYPTO ENGINE
2-19
2.3.1.9 Feed Control (FCBRDMAC, R/W, Address = 0xEA00_0028)
FCBRDMAC Bit Description R/W Initial State
Reserved [31:2] Reserved 0
BYTESWAP [1] If this bit is high, then the data read from the bus is
byte-swapped in a word boundary. If this bit is low
(default), then the data is handed over to the FIFO
without byte-swap. For little endian bus, this bit should
be ‘1’.
0
FLUSH [0] If this bit is high, then data flushes out from FIFO and
DMA. After flushing, the start address keeps the
stopped address, and the length is 0. The flushing state
should be released by writing value ‘0’ to this bit.
0
2.3.1.10 Feed Control (FCBTDMAS, R/W, Address = 0xEA00_0030)
FCBTDMAS Bit Description R/W Initial State
STARTADDR [31:0] Specifies the Start Address of DMA. The address needs
not to be aligned by 32-bit. Its value increases by 4 after
every transaction.
0
2.3.1.11 Feed Control (FCBTDMAL, R/W, Address = 0xEA00_0034)
FCBTDMAL Bit Description R/W Initial State
LENGTH [31:0] Specifies the Block length of DMA. The length needs
not to be aligned by 32-bit. Its value decreases by 4
after every transaction.
0