S5PC110_UM
1 DRAM CONTROLLER
1-5
17. Issue a
MRS
command using the
DirectCmd
register to reset memory device and program the operating
parameters.
18. Wait for minimum 1us.
19. Issue a
MRR
command using the
DirectCmd
register to poll the DAI bit of the
MRStatus
register to know
whether Device Auto-Initialization is completed or not.
20. If there are two external memory chips, perform steps 15 ~ 19 for chip1 memory device.
21. Set the
ConControl
to turn on an auto refresh counter.
22. If power down modes is required, set the
MemControl
registers.
1.2.1.3 DDR2
Initialization sequence for DDR2 memory type:
1. To provide stable power for controller and memory device, the controller must assert and hold CKE to a logic
low level. Then apply stable clock.
Note
: XDDR2SEL should be High level to hold CKE to low.
2. Set
the
PhyControl0.ctrl_start_point
and
PhyControl0.ctrl_inc
bit-fields to correct value according to clock
frequency. Set the
PhyControl0.ctrl_dll_on
bit-field to ‘1’ to turn on the PHY DLL.
3. DQS Cleaning: Set the
PhyControl1.ctrl_shiftc
and
PhyControl1.ctrl_offsetc
bit-fields to correct value
according to clock frequency and memory tAC parameters.
4. Set
the
PhyControl0.ctrl_start
bit-field to ‘1’.
5. Set
the
ConControl
. At this moment, an auto refresh counter should be off.
6. Set
the
MemControl
. At this moment, all power down modes should be off.
7. Set
the
MemConfig0
register. If there are two external memory chips, set the MemConfig1 register.
8. Set
the
PrechConfig
and
PwrdnConfig
registers.
9. Set
the
TimingAref
,
TimingRow
,
TimingData
and
TimingPower
registers according to memory AC
parameters.
10. If QoS scheme is required, set the
QosControl0~15
and
QosConfig0~15
registers.
11. Wait for the
PhyStatus0.ctrl_locked
bit-fields to change to ‘1’. Check whether PHY DLL is locked.
12. PHY DLL compensates the changes of delay amount caused by Process, Voltage and Temperature (PVT)
variation during memory operation. Therefore, PHY DLL should not be off for reliable operation. It can be off
except runs at low frequency. If off mode is used, set the
PhyControl0.ctrl_force
bit-field to correct value
according to the
PhyStatus0.ctrl_lock_value[9:2]
bit-field to fix delay amount. Clear the
PhyControl0.ctrl_dll_on
bit-field to turn off PHY DLL.
13. Confirm whether stable clock is issued minimum 200us after power on
14. Issue a
NOP
command using the
DirectCmd
register to assert and to hold CKE to a logic high level.
Содержание S5PC110
Страница 4: ...Section 1 OVERVIEW ...
Страница 28: ...Section 2 SYSTEM ...
Страница 374: ...S5PC110_UM 4 POWER MANAGEMENT 4 14 4 Let DRAMs exit from self refresh mode ...
Страница 473: ...S5PC110_UM 6 BOOTING SEQUENCE 6 10 Figure 6 3 Secure Booting Diagram ...
Страница 474: ...Section 3 BUS ...
Страница 491: ...S5PC110_UM 2 CORESIGHT Figure 2 4 Structure of the Coresight DAP Components 2 8 ...
Страница 506: ...Section 4 INTERRUPT ...
Страница 537: ...Section 5 MEMORY ...
Страница 540: ......
Страница 703: ...Section 6 DMA ...
Страница 705: ...List of Figures Figure Title Page Number Number Figure 1 1 Two DMA Tops 1 1 ...
Страница 737: ...Section 7 TIMER ...
Страница 795: ...Section 8 CONNECTIVITY STORAGE ...
Страница 883: ...S5PC110_UM 5 USB2 0 HS OTG 5 7 5 6 3 OTG FIFO ADDRESS MAPPING Figure 5 3 OTG FIFO Mapping ...
Страница 1085: ...S5PC110_UM 8 TRANSPORT STREAM INTERFACE 8 12 Figure 8 7 TSI Error Cases with SKIP mode TS_VALID TS_SYNC TS_ERROR is active high ...
Страница 1100: ...Section 9 MULTIMEDIA ...
Страница 1116: ...S5PC110_UM 1 0BDISPLAY CONTROLLER 1 5 Figure 1 2 Block Diagram of the Data Flow ...
Страница 1119: ...S5PC110_UM 1 0BDISPLAY CONTROLLER 1 8 1 3 3 2 1 32BPP 8888 Mode Pixel data contains Alpha value ...
Страница 1125: ...S5PC110_UM 1 0BDISPLAY CONTROLLER 1 14 1 3 3 2 7 16BPP Display 1555 P1 P2 P3 P4 P5 LCD Panel ...
Страница 1145: ...S5PC110_UM 1 0BDISPLAY CONTROLLER 1 34 Figure 1 10 Blending Decision Diagram ...
Страница 1149: ...S5PC110_UM 1 0BDISPLAY CONTROLLER 1 38 Figure 1 14 Hue Control Block Diagram ...
Страница 1184: ...S5PC110_UM 1 0BDISPLAY CONTROLLER 1 73 ...
Страница 1226: ...S5PC110_UM 1 0BDISPLAY CONTROLLER 1 115 ...
Страница 1242: ...S5PC110_UM 1 0BDISPLAY CONTROLLER 1 131 I80IFCONx Bit Description Initial State LDI_CMD 23 0 Specifies the LDI command 0 ...
Страница 1309: ...S5PC110_UM 2 1BCAMERA INTERFACE 2 62 Original Arbitary sepia Negative Art freeze Embossing Silhouette Figure 2 29 Image Effect ...
Страница 1328: ...S5PC110_UM 2 1BCAMERA INTERFACE 2 81 ...
Страница 1369: ...S5PC110_UM 4 3BMIPI CSIS 4 2 4 2 BLOCK DIAGRAM Figure 4 1 MIPI CSI System Block Diagram ...
Страница 1381: ...S5PC110_UM 4 3BMIPI CSIS 4 14 ...
Страница 1400: ...S5PC110_UM 6 5BMULTI FORMAT CODEC 6 8 Figure 6 3 QCIF Image in 16pixel x 16lines 1x1 Tiled Mode ...
Страница 1401: ...S5PC110_UM 6 5BMULTI FORMAT CODEC 6 9 Figure 6 4 QCIF Image in 64pixel x 32lines 4x2 Tiled Mode ...
Страница 1431: ...S5PC110_UM 6 5BMULTI FORMAT CODEC 6 39 ...
Страница 1471: ...S5PC110_UM 6 5BMULTI FORMAT CODEC 6 79 Figure 6 7 VC1 Parameters ...
Страница 1549: ...S5PC110_UM 8 7BVIDEO PROCESSOR 8 15 The guide of configuration Figure 8 5 Examples of Usage Cases ...
Страница 1606: ...S5PC110_UM 9 8BMIXER 9 26 Video layer Graphic layer0 Background layer blend blend blend Graphic laer1 Figure 9 4 Mixer Blending ...
Страница 1626: ...S5PC110_UM 10 9BHIGH DEFINITION MULTIMEDIA INTERFACE 10 17 Figure 10 10 Channel Status Block ...
Страница 1775: ...S5PC110_UM 13 12BG2D 13 6 FIMG 2D FIMG 2D FIMG 2D Figure 13 3 Rotation and Flip Example ...
Страница 1798: ...Section 10 AUDIO ETC ...
Страница 1803: ...S5PC110_UM 1 AUDIO SUBSYSTEM 1 2 Figure 8 7 Keypad I F Block Diagram 8 8 ...
Страница 1819: ...S5PC110_UM 2 IIS MULTI AUDIO INTERFACE 2 2 2 3 BLOCK DIAGRAM OF IIS MULTI AUDIO INTERFACE Figure 2 1 IIS Bus Block Diagram ...
Страница 1951: ...Section 11 SECURITY ...
Страница 1954: ...List of Tables Table Title Page Number Number Table 1 1 Security Features of S5PC110 1 2 ...
Страница 1964: ...S5PC110_UM 2 ADVANCED CRYPTO ENGINE Figure 2 9 DES Byte Swapping Scheme 2 9 ...
Страница 2005: ...Section 12 ETC ...
Страница 2020: ...S5PC110_UM 1 ELECTRICAL DATA 1 6 ONENAND AC ELECTRICAL CHARACTERISTICS Figure 1 6 OneNand Flash Timing 1 13 ...
Страница 2039: ...Section 13 SIZE BALL MAP ...
Страница 2098: ...S5PC110_UM 1 B TYPE SIZE BALL MAP 1 1 6 PACKAGE DIMENSION Figure 1 2 S5PC110 Package Dimension 596 FCFBGA Top View 1 54 ...
Страница 2099: ...S5PC110_UM 1 B TYPE SIZE BALL MAP Figure 1 3 S5PC110 Package Dimension 596 FCFBGA Side View 1 1 ...
Страница 2152: ...S5PC110_UM 2 D TYPE SIZE BALL MAP 2 1 6 PACKAGE DIMENSION Figure 2 2 S5PC110 Package Dimension 596 FCFBGA Top View 2 54 ...
Страница 2153: ...S5PC110_UM 2 D TYPE SIZE BALL MAP Figure 2 3 S5PC110 Package Dimension 596 FCFBGA Side View 2 55 ...
Страница 2207: ...S5PC110_UM 3 E TYPE SIZE BALL MAP 3 1 6 PACKAGE DIMENSION Figure 3 2 S5PC110 Package Dimension 596 FCFBGA Top View 3 54 ...
Страница 2208: ...S5PC110_UM 3 E TYPE SIZE BALL MAP Figure 3 3 S5PC110 Package Dimension 596 FCFBGA Side View 3 55 ...
Страница 2261: ...S5PC110_UM 4 F TYPE SIZE BALL MAP 4 1 6 PACKAGE DIMENSION Figure 4 2 S5PC110 Package Dimension 596 FCFBGA Top View 4 53 ...
Страница 2262: ...S5PC110_UM 4 F TYPE SIZE BALL MAP Figure 4 3 S5PC110 Package Dimension 596 FCFBGA Side View 4 54 ...
Страница 2317: ...S5PC110_UM 5 G TYPE SIZE BALL MAP 5 1 6 PACKAGE DIMENSION Figure 5 2 S5PC110 Package Dimension 596 FCFBGA Top View 5 55 ...
Страница 2318: ...S5PC110_UM 5 G TYPE SIZE BALL MAP Figure 5 3 S5PC110 Package Dimension 596 FCFBGA Side View 5 56 ...
Страница 2356: ...S5PC110_UM 6 H TYPE SIZE BALL MAP 6 38 POP_A OneDRAM A Port Ball Name I O Description POP_CEB_O IO POP_A DRAM Chip Enable ...
Страница 2370: ...S5PC110_UM 6 H TYPE SIZE BALL MAP 6 1 6 PACKAGE DIMENSION Figure 6 2 S5PC110 Package Dimension 596 FCFBGA Top View 6 52 ...
Страница 2371: ...S5PC110_UM 6 H TYPE SIZE BALL MAP Figure 6 3 S5PC110 Package Dimension 596 FCFBGA Side View 6 53 ...
Страница 2425: ...S5PC110_UM 7 I TYPE SIZE BALL MAP 7 1 6 PACKAGE DIMENSION Figure 7 2 S5PC110 Package Dimension 596 FCFBGA Top View 7 54 ...
Страница 2426: ...S5PC110_UM 7 I TYPE SIZE BALL MAP Figure 7 3 S5PC110 Package Dimension 596 FCFBGA Side View 7 55 ...