Samsung S5PC110, Руководство пользователя

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S5PC110_UM 2 1BCAMERA INTERFACE
2-67
MSCTRLn Bit Description R/W Initial State
0 = YCbCr 4:2:0 or 4:2:2 3plane input format
(ML=OX)
InFlipMd [14:13] Specifies image mirror and rotation for input DMA.
00 = Normal
01 = X-axis mirror
10 = Y-axis mirror
11 = 180° rotation (XY-axis mirror)
(ML=OX)
R/W 0
FIFO_CTRL [12] Specifies a basis FIFO control of input DMA or Input
Rotator.
0 = FIFO Full (Next burst transaction is possible except Full
FIFO)
1 = FIFO Empty (Next burst transaction is possible when
FIFO is empty)
(ML=XX) R/W 0
Reserved [11] Reserved R/W 0
BC_SEL [10] Selects the input DMA buffer change.
0 = Ping-Pong address is changed at interlace even/odd
field end.
1 = Ping-Pong address is changed at the frame operation
end.
(ML=OX) R/W 0
Reserved [9] Reserved RW 0
Buffer_Ptr [8] Specifies the input DMA buffer address selection pointer.
This register initializes to set the first frame address before
starting input DMA.
This register should not be written under frame operation.
0 = Buffer address 0
1 = Buffer address 1
(ML=OX) RW 0
Reserved [7] Reserved RW 0
EOF_M [6] If Input DMA operation is complete, it generates end of
frame.
(ML=OX) R 0
Order422_M [5:4] If source input DMA image is 1plane YCbCr 4:2:2, then
1plane YCbCr 4:2:2 inputs memory reading order style.
bit
MSB
LSB
00 Y3Cb1Y2Cr1Y1Cb0Y0Cr0
01 Cb1Y3Cr1Y2Cb0Y1Cr0Y0
10 Y3Cr1Y2Cb1Y1Cr0Y0Cb0
11 Cr1Y3Cb1Y2Cr0Y1Cb0Y0
(ML=OX)
R/W 0