Renesas SH7124 R5F7124, Руководство по оборудованию

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Section 13 A/D Converter (ADC)
Rev. 3.00 Sep. 27, 2007 Page 479 of 758
REJ09B0243-0300
13.3.1 A/D Data Registers 0 to 7 (ADDR0 to ADDR7)
ADDRs are 16-bit read-only registers. The conversion result for each analog input channel is
stored in ADDR with the corresponding number. (For example, the conversion result of AN4 is
stored in ADDR4.)
The converted 10-bit data is stored in bits 6 to 15. The lower 6 bits are always read as 0.
The data bus between the CPU and the A/D converter is 16 bits wide. When reading from ADDR,
access must be performed in words. The initial value of ADDR is H'0000.
Bit:
Initial value:
R/W:
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
R R R R
R R R R R R R R R R R R
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
- - - - - -
13.3.2 A/D Control/Status Registers_0 and _1 (ADCSR_0 and ADCSR_1)
ADCSR for each module controls A/D conversion operations.
Bit:
Initial value:
R/W:
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
R/(W) * R/W R R R/W R R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
Note: Writing 0 to this bit after reading it as 1 clears the flag and is the only allowed way.
*
ADF ADIE - - TRGE -
CONADF
STC CKSL[1:0] ADM[1:0] ADCS CH[2:0]
Bit Bit Name
Initial
Value
R/W Description
15 ADF 0 R/(W) * A/D End Flag
A status flag that indicates the end of A/D conversion.
[Setting conditions]
•
When A/D conversion ends in single mode
•
When A/D conversion ends on all specified
channels in scan mode
[Clearing condition]
•
When 0 is written after reading ADF = 1